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參數(shù)資料
| 型號(hào)： | UPD4723GS-GJG |
| 廠商： | NEC Corp. |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | Low Power 5V RS232 Dual Driver/Receiver with 0.1?μF Capacitors; Package: SO; No of Pins: 16; Temperature Range: -40?°C to 85?°C |
| 中文描述： | 電可擦除可編程邏輯器件 |
| 文件頁數(shù)： | 1/16頁 |
| 文件大小： | 125K |
| 代理商： | UPD4723GS-GJG |
1993
DATA SHEET
MOS INTEGRATED CIRCUIT
μ
PD4723
Document No. S12200EJ2V0DS00 (2nd edition)
(Previous No. IC-3284)
Date Published January 1997 N
Printed in Japan
RS-232 LINE DRIVER/RECEIVER AT 3.3 V/5 V
The
μ
PD4723 is a high-breakdown voltage silicon gate CMOS line driver/receiver based on the EIA/TIA-232-E
standard. The internal DC/DC converter can switch between multiple voltages, allowing it to operate with a single
+3.3 V or +5 V power supply. It also provides standby function.
This IC incorporates 3 driver circuits and 3 receiver circuits. An RS-232 interface circuit can be easily configured
by connecting 5 capacitors externally.
Features
Conforms to EIA/TIA-232-E (former name, RS-232C) standards
Selectable +3.3 V/+5 V single power supply (selected by V
CHA
pin)
By setting the standby pin to a low level (standby mode), circuit current can be reduced. At such times,
the driver output is in a high-impedance state.
Even in the standby mode, 2 receiver circuits can operate as inverters without hysteresis width.
The other circuit is fixed at a high level.
Ordering Information
Part number
Package
μ
PD4723GS-GJG
30-pin plastic SSOP (300 mil)
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