參數(shù)資料
型號: UPD44164082
廠商: NEC Corp.
英文描述: 18M-BIT DDRII SRAM 2-WORD BURST OPERATION
中文描述: 1800萬位的SRAM 2條DDRII字爆發(fā)運作
文件頁數(shù): 1/32頁
文件大?。?/td> 275K
代理商: UPD44164082
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MOS INTEGRATED CIRCUIT
μ
PD
44164082, 44164182, 44164362
18M-BIT DDRII SRAM
2-WORD BURST OPERATION
Document No. M15821EJ7V2DS00 (7th edition)
Date Published August 2004 NS CP(K)
Printed in Japan
DATA SHEET
2001
Description
The
μ
PD44164082 is a 2,097,152-word by 8-bit, the
μ
PD44164182 is a 1,048,576-word by 18-bit and the
μ
PD44164362 is a 524,288-word by 36-bit synchronous double data rate static RAM fabricated with advanced CMOS
technology using full CMOS six-transistor memory cell.
The
μ
PD44164082,
μ
PD44164182 and
μ
PD44164362 integrates unique synchronous peripheral circuitry and a
burst counter. All input registers controlled by an input clock pair (K and /K) are latched on the positive edge of K and
/K.
These products are suitable for application which require synchronous operation, high speed, low voltage, high
density and wide bit configuration.
These products are packaged in 165-pin PLASTIC BGA.
Features
1.8 ± 0.1 V power supply and HSTL I/O
DLL circuitry for wide output data valid window and future frequency scaling
Pipelined double data rate operation
Common data input/output bus
Two-tick burst for low DDR transaction size
Two input clocks (K and /K) for precise DDR timing at clock rising edges only
Two output clocks (C and /C) for precise flight time
and clock skew matching-clock and data delivered together to receiving device
Internally self-timed write control
Clock-stop capability with
μ
s restart
User programmable impedance output
Fast clock cycle time : 4.0 ns (250 MHz), 5.0 ns (200 MHz), 6.0 ns (167 MHz)
Simple control logic for easy depth expansion
JTAG boundary scan
相關(guān)PDF資料
PDF描述
UPD44164182F5-E40-EQ1 18M-BIT DDRII SRAM 2-WORD BURST OPERATION
UPD44164082F5-E50-EQ1 18M-BIT DDRII SRAM 2-WORD BURST OPERATION
UPD44164182F5-E50-EQ1 18M-BIT DDRII SRAM 2-WORD BURST OPERATION
UPD44164362F5-E50-EQ1 18M-BIT DDRII SRAM 2-WORD BURST OPERATION
UPD44164082F5-E60-EQ1 18M-BIT DDRII SRAM 2-WORD BURST OPERATION
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UPD44164182AF5-E37Y-EQ2-A 制造商:Renesas Electronics Corporation 功能描述:UPD44164182A Series 18 Mbit (1 M x 18 ) 270 MHz 0.3 ns DDRII SRAM - BGA-165
UPD44164182F5-E50-EQ1 制造商:Renesas Electronics Corporation 功能描述:UPD44164182 Series 18 Mb (1 M x 18 ) 200 MHz 5 ns DDRII SRAM - BGA-165
UPD44164362F5-E60-EQ1ES 制造商:NEC Electronics Corporation 功能描述:
UPD44165092BF5-E40-EQ3-A 制造商:Renesas Electronics Corporation 功能描述:2MX9, 2BURST, 250 MHZ QDRII SRAM - Trays
UPD44165094BF5-E40-EQ3-A 制造商:Renesas Electronics Corporation 功能描述:SRAM Chip Sync Dual 1.8V 18M-Bit 2M x 9-Bit 0.45ns 165-Pin BGA