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參數資料
| 型號： | UPD2845GR-E2 |
| 廠商： | NEC Corp. |
| 英文描述： | 1 V, 1.3 mA, 94MHz PLL SYNTHESIZER LSI FOR PAGER SYSTEM |
| 中文描述： | 1伏，1.3毫安，94MHz PLL頻率合成器大規(guī)模集成電路的尋呼系統 |
| 文件頁數： | 13/16頁 |
| 文件大?。?/td> | 144K |
| 代理商： | UPD2845GR-E2 |
13
P
PD2845GR
PHASE COMPARATOR
PHASE COMPARATOR compares the phase between divided input frequency (f
p
) and reference frequency (f
r
).
This circuit make the change pump output signals according to following detection.
*3
To use internal charge pump
(passive filter type)
*4
To use external charge pump
(active filter type)
VCO should be used as type of ‘higher voltage-
higher frequency’.
EO
EOP
EON
EOP is Pch open drain, EON is Nch open drain. EO is output pin of internal charge pump.
SYSTEM APPLICATION EXAMPLE
Pager block diagram of direct conversion type
∫
∫
LPF
×
5
π
/2
DET
DECODER
DRIVER
DRIVER
BZ
LCD
CLOCK
PD2845GR
μ
PLL
LPF
detection
EO
*3
EOP
*4
EON
*4
f
r
> f
p
H
H
OFF
f
r
= f
p
Hi-Impedance
OFF
OFF
f
r
< f
p
L
OFF
L
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