參數(shù)資料
型號(hào): UPD178F054
英文描述: 78K/0 Series for Instructions | User's Manual[10/2001]
中文描述: 78K線/ 0系列說明|用戶手冊[10/2001]
文件頁數(shù): 81/129頁
文件大小: 644K
代理商: UPD178F054
55
CHAPTER 5 EXPLANATION OF INSTRUCTIONS
User's Manual U12326EJ4V0UM
Add
ADD
Byte Data Addition
[Instruction format]
ADD dst, src
[Operation]
dst, CY
← dst + src
[Operand]
Mnemonic
Operand(dst,src)
Mnemonic
Operand(dst,src)
ADD
A, #byte
ADD
A, !addr16
saddr, #byte
A, [HL]
A, r
Note
A, [HL+byte]
r, A
A, [HL+B]
A, saddr
A, [HL+C]
Note Except r = A
[Flag]
ZAC
CY
×××
[Description]
The destination operand (dst) specified by the 1st operand is added to the source operand (src) specified
by the 2nd operand and the result is stored in the CY flag and the destination operand (dst).
If the addition result shows that dst is 0, the Z flag is set (1). In all other cases, the Z flag is cleared (0).
If the addition generates a carry out of bit 7, the CY flag is set (1). In all other cases, the CY flag is cleared
(0).
If the addition generates a carry for bit 4 out of bit 3, the AC flag is set (1). In all other cases, the AC flag
is cleared (0).
[Description example]
ADD CR10, #56H; 56H is added to the CR10 register and the result is stored in the CR10 register.
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