參數(shù)資料
型號: UJA1065
廠商: NXP Semiconductors N.V.
英文描述: High-speed CAN/LIN fail-safe system basis chip
中文描述: 高速的CAN / LIN故障防護系統(tǒng)基礎(chǔ)芯片
文件頁數(shù): 44/67頁
文件大?。?/td> 285K
代理商: UJA1065
9397 750 14409
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Objective data sheet
Rev. 01 — 10 August 2005
44 of 67
Philips Semiconductors
UJA1065
High-speed CAN/LIN fail-safe system basis chip
There are two possibilities to enter Software Development mode. One is by setting the
ISDM bit via the Special Mode register; possible only once after a first battery connection
while the SBC is in Start-up mode. The second possibility to enter Software Development
mode is by applying a 7 V to 7.5 V input voltage at pin TEST before the battery is applied
to pin BAT42.
To stay in Software Development mode the SDM bit in the Mode register has to be set with
each Mode register access (i.e. Watchdog triggering) regardless of how Software
Development mode was entered.
The Software Development mode can be exited at any time by clearing the SDM bit in the
Mode register. Re-entering the Software Development mode is only possible by
reconnecting the battery supply (pin BAT42), thereby forcing a new power-on reset.
6.14.2
Forced Normal mode
For system evaluation purposes the UJA1065 offers the Forced Normal mode. This mode
is strictly for evaluation purposes only. In this mode the characteristics as defined in
Section 8
and
Section 9
cannot be guaranteed.
In Forced normal mode the SBC behaves as follows:
SPI access (writing and reading) is blocked
Watchdog disabled
Interrupt monitoring disabled
Reset monitoring disabled
Reset lengthening disabled
All transitions to Fail-safe mode are disabled, except a V1 under voltage for more than
256 ms
V1 is started with the defined reset (20 ms LOW-to-HIGH transition) In case of a V1
under voltage, a reset is performed until V1 is restored (normal behavior), and the
SBC stays in Forced Normal mode; in case of a continuous overload at V1 (> 256 ms)
Fail-safe mode is entered
V2 is on; overload protection active
V3 is on; overload protection active
CAN and LIN are in Active mode and cannot switch to Off-line mode
INH/LIMP pin is HIGH
SYSINH is HIGH
EN pin at same level as RSTN pin
Forced Normal mode is activated by applying a stable 12 V to 12.5 V input voltage at the
TEST pin during first battery connection.
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UJA1065TW 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:High-speed CAN/LIN fail-safe system basis chip
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