參數(shù)資料
型號： UJA1065
廠商： NXP Semiconductors N.V.
英文描述： High-speed CAN/LIN fail-safe system basis chip
中文描述： 高速的CAN / LIN故障防護(hù)系統(tǒng)基礎(chǔ)芯片
文件頁數(shù)： 29/67頁
文件大?。?/td> 285K
代理商： UJA1065
9397 750 14409
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Objective data sheet
Rev. 01 — 10 August 2005
29 of 67
Philips Semiconductors
UJA1065
High-speed CAN/LIN fail-safe system basis chip
6.13.3
Mode register
In the Mode register the watchdog is defined and re-triggered, and the SBC operating
mode is selected. The Mode register also contains the global enable output bit (EN) and
the Software Development Mode (SDM) control bit. During system operation cyclic access
to the Mode register is required to serve the watchdog. This register can be written to in all
modes.
At system start-up the Mode register must be written to within t
WD(init)
from releasing
RSTN (HIGH-level on RSTN). Any write access is checked for proper watchdog and
system mode coding. If an illegal code is detected, access is ignored by the SBC and a
system reset is forced in accordance with the state diagram of the system controller; see
Figure 3
.
[1]
Flash mode can be entered only with the watchdog service sequence ‘Normal mode to Flash mode to Normal mode to Flash mode’,
while observing the watchdog trigger rules. With the last command of this sequence the SBC forces a system reset, and enters Start-up
mode to prepare the Cfor flash memory download. The four RSS bits in the System Status register reflect the reset source information,
confirming the Flash entry sequence. By using the Initializing Flash mode (within t
WD(init)
after system reset) the SBC will now
successfully enter Flash mode.
[2]
See
Section 6.14.1
.
Table 5:
Bit
15 and 14
13
Mode register bit description (bits 15 to 12 and 5 to 0)
Symbol
Description
A1, A0
register address
RRS
Read Register
Select
Value
00
1
0
1
0
Function
select Mode register
read System Diagnosis register
read System Status register
read selected register without writing to Mode register
read selected register and write to Mode register
12
RO
Read Only
11 to 6
5 to 3
NWP[5:0]
OM[2:0]
see
Table 6
Operating Mode
001
010
011
100
101
110
111
1
0
Normal mode
Standby mode
initialize Flash mode
[1]
Sleep mode
initialize Normal mode
leave Flash mode
Flash mode
[1]
Software Development Mode enabled
[2]
Normal watchdog, interrupt, reset monitoring and fail-safe
behavior
EN output pin HIGH
EN output pin LOW
reserved for future use; should remain cleared to ensure
compatibility with future functions which might use this bit
2
SDM
Software
Development
Mode
1
EN
Enable
1
0
0
0
-
reserved
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UJA1065TW 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:High-speed CAN/LIN fail-safe system basis chip
UJA1065TW/3V0 功能描述:網(wǎng)絡(luò)控制器與處理器 IC HI SPEED CAN SYSTEM RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
UJA1065TW/3V0,512 功能描述:CAN 接口集成電路 HI SPEED CAN SYSTEM RoHS:否 制造商:Texas Instruments 類型:Transceivers 工作電源電壓:5 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:SOIC-8 封裝:Tube
UJA1065TW/3V0,518 功能描述:網(wǎng)絡(luò)控制器與處理器 IC HI SPEED CAN SYSTEM RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
UJA1065TW/3V0512 制造商:NXP Semiconductors 功能描述:CONTROLLER SYS CAN/LIN 3V 32HTSSOP
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