參數(shù)資料
型號: U634H256CD1K25
英文描述: NVRAM (EEPROM Based)
中文描述: NVRAM中(EEPROM的基礎(chǔ))
文件頁數(shù): 8/14頁
文件大?。?/td> 239K
代理商: U634H256CD1K25
8
December 12, 1997
U634H256
PowerStore and automatic Power Up RECALL
Hardware Controlled STORE
DQi
Output
Previous Data Valid
HSB
t
en(H)S
t
d(H)S
Data Valid
t
dis(H)S
p:
q:
r:
t
PDSTORE
approximate t
d(E)S
or t
d(H)S
; t
DELAY
approximate t
dis(H)S
.
After t
HSB is hold down internal by STORE operation.
An automatic RECALL also takes place at power up, starting when V
exceeds V
SWITCH
and takes t
RESTORE
. V
CC
must not drop below
V
SWITCH
once it has been exceeded for the RECALL to function properly.
s: Once the software controlled STORE or RECALL cycle is initiated, it completes automatically, ignoring all inputs.
t:
Noise on the E pin may trigger multiple READ cycles from the same address and abort the address sequence.
No.
Software Controlled STORE/
RECALL Cycle
Symbol
25
35
45
Unit
Alt.
IEC
Min. Max. Min. Max. Min. Max.
29
STORE/RECALL Initiation Time
t
AVAV
t
cR
25
35
45
ns
30
Chip Enable to Output Inactive
s
t
ELQZ
t
dis(E)SR
600
600
600
ns
31
STORE Cycle Time
t
ELQXS
t
d(E)S
10
10
10
ms
32
RECALL Cycle Time
r
t
ELQXR
t
d(E)R
20
20
20
μ
s
33
Address Setup to Chip Enable
t
t
AVELN
t
su(A)SR
0
0
0
ns
34
Chip Enable Pulse Width
s, t
t
ELEHN
t
w(E)SR
20
25
30
ns
35
Chip Disable to Address Change
t
t
EHAXN
t
h(A)SR
0
0
0
ns
t
w(H)Sq
28
26
27
25
High Impedance
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
V
CAP
5.0 V
V
SWITCH
t
PowerStore
Power Up
RECALL
W
DQi
POWER UP
RECALL
BROWN OUT
NO STORE
t
RESTOR
E
t
RESTORE
BROWN OUT
PowerStore
(NO SRAM WRITES)
24
24
t
PDSTOREp
t
DELAYp
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