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參數(shù)資料
| 型號(hào)： | TZA1047HL/M1B |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | 10 X 10 MM, 1.4 MM HEIGHT, PLASTIC, MS-026, SOT314-2, LQFP-64 |
| 文件頁(yè)數(shù)： | 16/69頁(yè) |
| 文件大?。?/td> | 324K |
| 代理商： | TZA1047HL/M1B |
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9397 750 14664
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 1 June 2005
23 of 69
Philips Semiconductors
TZA1047
Preprocessor IC for CD and DVD rewritable
7.10 EFMTIM Timing
The EFMTIM circuit supplies the various timing signals that are required for the writing
functions. The input and output signals of this circuit are shown in Figure 10.
The EFMTIM can operate in internal mode (bit EFMINT = 1) or external mode (bit
EFMINT = 0). In internal mode, the various write sampling signals are generated inside
the TZA1047. In external mode, the internal EFMTIM block is disabled and the separate
signals: r/w, RS TH1 and TH2 can be controlled externally via the appropriate pins. In
internal mode, the EFMTIM block can be switched off by setting bit EFMON to logic 0.
This mode can be used to conserve current in sample-less systems. An overview of
EFMTIM modes is given in Table 9.
[1]
This mode is not harmful to the device but does not produce useful results.
7.10.1 Input signals
As the inputs of EFMTIM, in both internal and external modes, are high frequency digital
signals, a special interface is provided to enable the transfer of these signals from the
decoder IC to TZA1047. The exception to this is the signal R/W, which has less stringent
timing requirements and is a normal 3.3 V CMOS level signal. The general principle of the
input circuit is shown in Figure 11.
Fig 10. EFMTIM.
Table 9:
EFMTIM modes
EFMINT
EFMON
Mode
Expected input signals
1
internal; active
EFM clock and data
1
0
internal; inactive (power save)
EFM clock and data
0
1
do not use [1]
N/A
0
external
sample signals: RS, TH1 and TH2
001aab195
SMPLON, P/L, L/T, FR, FW, RST,
EFMON, ENRW, ENRS, EFMTST
TIM8
EFMINT
TH1
TH2
RS
efmcp
efmcn
efmdp
TIMOUT
R/W
REF/ECN
RS/ECP
TH1/EDN
TH2/EDP
TH1,
TH2,
RS,
r/w
RWOUT
SELECT
EFMTIM
CORE
INPUT
CIRCUIT
EFMINT
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