SLES206B
– MAY 2007 – REVISED MAY 2011
I
2C Host Interface
Communication with the TVP7002 device is via an I2C host interface. The I2C standard consists of two signals,
serial input/output data (SDA) line and input clock line (SCL), which carry information between the devices
connected to the bus. A third signal (I2CA) is used for slave address selection. Although an I2C system can be
multi-mastered, the TVP7002 can function as a slave device only.
Since SDA and SCL are kept open drain at logic high output level or when the bus is not driven, the user should
connect SDA and SCL to a positive supply voltage via a pullup resistor on the board. SDA is implemented
bidirectional. The slave addresses select, terminal 73 (I2CA), enables the use of two TVP7002 devices tied to the
same I2C bus, as it controls the least significant bit of the I2C device address
Table 9. I2C Host Interface Terminal Description
SIGNAL
TYPE
DESCRIPTION
I2CA
I
Slave address selection
SCL
I
Input clock line
SDA
I/O
Input/output data line
Reset and I
2C Bus Address Selection
The TVP7002 can respond to two possible chip addresses. The I2 slave address is continuously interpreted from
the logic level present at the I2CA terminal. The I2C slave address must be configured with an external
connection to either IOGND (I2C address = B8h) or IOVDD (I2C address= BAh). A 2.2-k
Ω pullup or pulldown
resistor may be used for this connection.
Table 10. I2C Host Interface Device Addresses
A6
A5
A4
A3
A2
A1
A0 (I2CA)
R/W
HEX
1
0
1
0
0(1)
1/0
B9h/B8h
1
0
1
0
1(2)
1/0
BBh/BAh
(1)
If I2CA terminal 73 is strapped to IOGND, I2C device address A0 is set to 0.
(2)
If I2CA terminal 73 is strapped to IOVDD, I2C device address A0 is set to 1.
I
2C Operation
Data transfers occur utilizing the following illustrated formats.
S
10111000
ACK
Subaddress
ACK
Send data
ACK
P
Read from I2C control registers
S
10111000
ACK
Subaddress
ACK
S
10111001
ACK
Receive data
NAK
P
S = I2C bus Start condition
P = I2C bus Stop condition
ACK = Acknowledge generated by the slave
NAK = Acknowledge generated by the master, for multiple byte read master with ACK each byte except last byte
Subaddress = Subaddress byte
Data = Data byte, if more than one byte of DATA is transmitted (read and write), the subaddress pointer is
automatically incremented
I2C bus address = Example shown that I2CA is in default mode; write (B8h), read (B9h).
Copyright
2007–2011, Texas Instruments Incorporated
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