參數(shù)資料
型號(hào): TVP5146M2IPFP
廠商: TEXAS INSTRUMENTS INC
元件分類: 顏色信號(hào)轉(zhuǎn)換
英文描述: COLOR SIGNAL DECODER, PQFP80
封裝: GREEN, PLASTIC, HTQFP-80
文件頁(yè)數(shù): 77/107頁(yè)
文件大?。?/td> 949K
代理商: TVP5146M2IPFP
SLES141G
– JULY 2005 – REVISED APRIL 2011
Table 2-77. F-Bit and V-Bit Control 2 Register
Subaddress
75h
Default
16h
7
6
5
4
3
2
1
0
Reserved
Fast lock
F and V [1:0]
Phase detector
HPLL
Fast lock:
Enable fast lock where vertical PLL is reset and a 2-second timer is initialized when vertical lock is lost; during time-out the detected
input VSYNC is output.
0 = Disabled
1 = Enabled (default)
F and V [1:0]
F AND V
LINES PER FRAME
F BIT
V BIT
Standard
ITU-R BT 656
00
Nonstandard even
Forced to 1
Switch at field boundary
Nonstandard odd
Toggles
Switch at field boundary
Standard
ITU-R BT 656
01
Nonstandard
Toggles
Switch at field boundary
Standard
ITU-R BT 656
10
Nonstandard
Pulsed mode
Switch at field boundary
11
Reserved
Phase detector:
Enable integral window phase detector
0 = Disabled
1 = Enabled (default)
HPLL:
Enable horizontal PLL to free run
0 = Disabled (default)
1 = Enabled
Table 2-78. VCR Trick Mode Control Register
Subaddress
76h
Default
8Ah
7
6
5
4
3
2
1
0
Switch header
Horizontal shake threshold [6:0]
Switch header:
When in VCR trick mode, the header noisy area around the head switch is skipped.
0 = Disabled
1 = Enabled (default)
Horizontal shake threshold [6:0]:
000 0000 = Zero threshold
000 1010 = 0Ah (default)
111 1111 = Largest threshold
Table 2-79. Horizontal Shake Increment Register
Subaddress
77h
Default
64h
7
6
5
4
3
2
1
0
Horizontal shake increment [7:0]
Horizontal shake increment [7:0]:
000 0000 = 0 000
1010 = 64h (default)
111 1111 = FFh
Copyright
2005–2011, Texas Instruments Incorporated
Functional Description
71
Product Folder Link(s): TVP5146M2
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