參數(shù)資料
型號(hào)： TVP3020-175
廠商： Texas Instruments, Inc.
英文描述： Video Interface PALETTE(視頻接口調(diào)色器)
中文描述： 視頻接口盒（視頻接口調(diào)色器）
文件頁(yè)數(shù)： 22/98頁(yè)
文件大?。?/td> 582K
代理商： TVP3020-175
2–8
group of data to be displayed as soon as the palette comes out of blank. Figures 2–3 and 2–5 show the case
when the SSRT (split shift-register transfer) function is enabled. When a rising edge occurs on the SFLAG
input, one SCLK with a minimum of 15-ns pulse duration is generated after the specified delay. Since this
is designed to meet VRAM timing requirements, the SSRT-generated SCLK replaces the first SCLK in the
regular shift register transfer case as described above. Refer to Section 2.15 for a detailed explanation of
the SSRT function.
Externally clocked timing can be chosen for the pixel bus (P0–P63) by setting auxiliary control register bit 3
to a logic 0. In externally clocked mode, the RCLK or SCLK output of the palette is not used as the timing
reference to present data to the pixel bus. Instead, pixel data is presented to the palette with a synchronous
clock and all palette timing is referenced to this clock. In this mode, the external clock should be connected
to LCLK and the selected clock input. (If the VGA port is enabled, the CLK0 input is selected independent
of the input clock selection register.)
The externally clocked frame-buffer interface mode is intended for applications where windowed or
pixel-by-pixel switching between the VGA port and the pixel port is desired in non-VRAM-based graphics
systems. In such applications, the VGA port is enabled (multiplex-control register bit 7 set to logic 1) and
the appropriate direct color mode is set in the multiplex-control register. The auxiliary window, port select,
and/or color-key switching functions are then configured and enabled to perform the desired switching. By
setting the frame-buffer interface to the externally clocked mode, the pixel port and VGA port timing and
pipeline delay are made the same. Also, since the VGA port is enabled, all video control signal timing is
referenced to CLK0, utilizing the VGABL, VGAHS, and VGAVS inputs.
The externally clocked frame-buffer interface timing can also be used in non-VGA switching applications,
utilizing only the pixel port or only the VGA port. In either case, it is recommended that VGA video control
signals be used (i.e., VGABL, VGAHS, VGAVS). In this way, all pixel data and video control signals are
referenced to CLK0, and video blank and sync are aligned with pixel data.
NOTE:
If the pixel port is used in externally clocked mode (ACR3 = 0), RCLK must
be set to DOT/1 in the output-clock-selection register and a 1:1 multiplexing mode
must be selected in the multiplexer control registers (see Table 2–6). The external
clock should be connected to the LCLK input as well as the selected clock input.
If the VGA port is also enabled (MCRB7 = 1), CLK0 is selected as the input clock
independent of the input-clock-selection register setting.
VGA switching can only be performed using a 1:1 multiplexing mode.
Overlay switching can only be performed using a 1:1 multiplexing mode if the pixel
port is set for externally clocked mode. If the pixel port is self-clocked, any of the
multiplex ratios available in Table 2–6 may be used.
If VGA switching is to be performed using externally clocked mode (ACR3 = 0), the
full VGA port frequency of 85 MHz may be utilized provided that the VGA port and
the pixel port are both synchronized to the CLK0 input clock.
If VGA switching is to be performed using self-clocked mode (ACR3 = 1), the
maximum pixel rate cannot exceed 50 MHz. This is because of internal delay from
the CLK0 input to the RCLK output.
相關(guān)PDF資料
PDF描述
TVP3020-135 Video Interface PALETTE(視頻接口調(diào)色器)
TVP3025-135 Video Interface PALETTE(三PLL，視頻接口調(diào)色器)
TVP3025-175 Video Interface PALETTE(三PLL，視頻接口調(diào)色器)
TVP3030-175 Video Interface PALETTE Exract(1600×1200，24位真彩色視頻接口調(diào)色器)
TVP3030-220 Video Interface PALETTE Exract(1600×1200，24位真彩色視頻接口調(diào)色器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TVP3020-175MDN 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette
TVP3020-175PCE 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette
TVP3020-200MDN 制造商:Rochester Electronics LLC 功能描述:- Bulk
TVP3020-200PCE 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC)
TVP3020-220MDN 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette
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