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參數(shù)資料
| 型號(hào)： | TSS901ESASL3 |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 3 CHANNEL(S), 200M bps, SERIAL COMM CONTROLLER, QFP196 |
| 封裝： | MQFP-196 |
| 文件頁數(shù)： | 4/28頁 |
| 文件大?。?/td> | 601K |
| 代理商： | TSS901ESASL3 |
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Rev. B - July 29, 1999
12
TSS901E
3. Signal Description
The Figure below shows the TSS901E (also called SMCS332) embedded in a typical module environment:
This section describes the pins of the TSS901E. Groups of pins represent busses where the highest number is the MSB.
O = Output; I = Input; Z = High Impedance; (*) = active low signal
O/Z = if using a configuration with two TSS901Es these signals can directly be connected together (WIROR)
Signal Name
Type
Function
max. output
current [mA]
load [pF]
HSEL*
I
Select host interface
HRD*
I
host interface read strobe
HWR*
I
host interface write strobe
HADR(7:0)
I
TSS901E register address lines. This address lines will be used to
access (address) the TSS901E registers.
HDATA(31:0)
IO/Z
TSS901E data
3
50
HACK
O/Z
host acknowledge. TSS901E deasserts this output to add wait states
to a TSS901E access. After TSS901E is ready this output will be
asserted.
350
HINTR*
O/Z
host interrupt request line
3
50
TSS901EADR(3:0)
I
TSS901E Address. The binary value of this lines will be compared
with the value of the TSS901E ID lines.
TSS901EID(3:0)
I
TSS901E ID lines: offers possibility to use sixteen TSS901E within
one HSEL*
HOSTBIGE
I
1: host I/F Big Endian
0: host I/F Little Endian
BOOTLINK
I
1: control by link
0: control by host
CMCS(1:0)*
O/Z
Communication memory select lines. These pins are asserted as
chip selects for the corresponding banks of the communication
memory.
825
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