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參數(shù)資料
| 型號： | TSS901ESASL3 |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 3 CHANNEL(S), 200M bps, SERIAL COMM CONTROLLER, QFP196 |
| 封裝： | MQFP-196 |
| 文件頁數(shù)： | 2/28頁 |
| 文件大?。?/td> | 601K |
| 代理商： | TSS901ESASL3 |
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Rev. B - July 29, 1999
10
TSS901E
2.2.3 TSS901E channel 2 status and control registers
2.2.4 TSS901E channel 3 status and control registers
Port Width /
Address (hex)
Register
Function
Reset Value
(hex)
Access
32
16
8
30
CH2_DSM_MODR
channel 2 DSM mode Register
03
r / w
31
CH2_DSM_CMDR
channel 2 DSM command Register
00
r / w
32
CH2_DSM_STAR
channel 2 DSM status Register
00
r / w
33
CH2_DSM_TSTR
channel 2 DSM test Register
00
r / w
34
CH2_ADDR
channel 2 address Register
00
r / w
35
CH2_RT_ADDR
channel 2 Route Address Register
00
r / w
36
CH2_PR_STAR
channel 2 Protocol Status Register
04
r / w
37
reserved
00
38
CH2_CNTRL1
channel 2 control Register 1
00
r / w
39
CH2_CNTRL2
channel 2 control Register 2
00
r / w
3A
CH2_HTID
channel 2 Header Transaction ID byte
00
ro
3B
CH2_HCNTRL
channel 2 Header control byte
00
ro
3C
CH2_ESR1
channel 2 detailed error source register 1
00
r / w
3D
CH2_ESR2
channel 2 detailed error source register 2
00
r / w
3E
reserved
00
3F
CH2_COMICFG
channel 2 COMI conguration register
00
r / w
40
41
CH2_TX_SAR
channel 2 transmit Start Address Register
00
r / w
42
43
CH2_TX_EAR
channel 2 transmit End Address Register
00
r / w
44
45
CH2_TX_CAR
channel 2 transmit Current Address Register
00
ro
46
CH2_TX_FIFO
channel 2 transmit FIFO
00
wo
47
CH2_TX_EOPB
channel 2 transmit EOP Bit Register
00
wo
48
49
CH2_RX_SAR
channel 2 receive Start Address Register
00
r / w
4A
4B
CH2_RX_EAR
channel 2 receive End Address Register
00
r / w
4C
4D
CH2_RX_CAR
channel 2 receive Current Address Register
00
ro
4E
CH2_RX_FIFO
channel 2 receive FIFO
xxxxxxxx
ro
4F
CH2_STAR
channel 2 Status Register
01
ro
Port Width /
Address (hex)
Register
Function
Reset Value
(hex)
Access
32
16
8
50
CH3_DSM_MODR
channel 3 DSM mode Register
03
r / w
51
CH3_DSM_CMDR
channel 3 DSM command Register
00
r / w
52
CH3_DSM_STAR
channel 3 DSM status Register
00
r / w
53
CH3_DSM_TSTR
channel 3 DSM test Register
00
r / w
54
CH3_ADDR
channel 3 address Register
00
r / w
55
CH3_RT_ADDR
channel 3 Route address Register
00
r / w
56
CH3__PR_STAR
channel 3 Protocol Status Register
04
r / w
57
reserved
00
58
CH3_CNTRL1
channel 3 control Register 1
00
r / w
59
CH3_CNTRL2
channel 3 control Register 2
00
r / w
5A
CH3_HTID
channel 3 Header Transaction ID byte
00
ro
5B
CH3_HCNTRL
channel 3 Header control byte
00
ro
5C
CH3_ESR1
channel 3 detailed error source register 1
00
r / w
5D
CH3_ESR2
channel 3 detailed error source register 2
00
r / w
相關(guān)PDF資料 |
PDF描述 |
|---|---|
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| TSSH-112-01-S-D | 24 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SOLDER |
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| TSSH-117-01-S-DV-LC | 34 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TSS902EMA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:VITERBI DECODER|CMOS|QFL|132PIN|CERAMIC |
| TSS902EMA/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:VITERBI DECODER|CMOS|QFL|132PIN|CERAMIC |
| TSS902EMA-E | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:VITERBI DECODER|CMOS|QFL|132PIN|CERAMIC |
| TSS902EMAP883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:VITERBI DECODER|CMOS|QFL|132PIN|CERAMIC |
| TSS902EMAPIND | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:VITERBI DECODER|CMOS|QFL|132PIN|CERAMIC |
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