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參數(shù)資料
| 型號： | TSL1401CS-LF |
| 廠商： | AMS-TAOS USA Inc |
| 文件頁數(shù)： | 9/19頁 |
| 文件大?。?/td> | 680K |
| 描述： | IC OPTO SENSOR ARRAY CSP PCB MT |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | * |
| 其它名稱： | TSL1401-CS-LFDKR |
TSL1401CSLF
128 ?1 LINEAR SENSOR ARRAY WITH HOLD
TAOS072E APRIL 2007
8
r
r
Copyright E 2007, TAOS Inc.
The LUMENOLOGY r Company
www.taosinc.com
APPLICATION INFORMATION
Power Supply Considerations
A 0.1 糉 bypass capacitor should be connected between V
DD
and ground as close as possible to the device.
Connection Diagrams
The HOLD pin on the device is normally connected to the SI pin in single-die operation. In multi-die operation
of n die, the HOLD pin is used to provide a continuous scan across the n die. See Figure 9 for an example of
this wiring configuration. Note that there is a single AO signal when used in this mode. Alternately, the individual
die may be scanned all at once by connecting the individual SI and HOLD lines and reading the AO signals in
parallel. See Figure 10 for an example of this wiring configuration.
SO
7
AO
6
GND
GND
SI
HOLD
CLK
TSL1401CSLF
V
DD
5
8
4
3
2
1
SO
7
AO
6
GND
SI
HOLD
CLK
TSL1401CSLF
V
DD
5
8
4
3
2
1
SO
7
AO
6
GND
SI
HOLD
CLK
TSL1401CSLF
V
DD
5
8
4
3
2
1
AO
SI
CLK
V
DD
C1
0.1 mF
C2
0.1 mF
C3
0.1 mF
Figure 9. Multi-Die Continuous Scan
SO
7
AO
6
GND
GND
SI
HOLD
CLK
TSL1401CSLF
V
DD
5
8
4
3
2
1
SO
7
AO
6
GND
SI
HOLD
CLK
TSL1401CSLF
V
DD
5
8
4
3
2
1
SO
7
AO
6
GND
SI
HOLD
CLK
TSL1401CSLF
V
DD
5
8
4
3
2
1
AO2
SI
CLK
V
DD
AO1
AO3
C1
0.1 mF
C2
0.1 mF
C3
0.1 mF
Figure 10. Multi-Die Individual Scan
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