參數(shù)資料
型號: TSC2003IPWT
廠商: TEXAS INSTRUMENTS INC
元件分類: ADC
英文描述: 2-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO16
封裝: PLASTIC, TSSOP-16
文件頁數(shù): 12/25頁
文件大?。?/td> 535K
代理商: TSC2003IPWT
TSC2003
2
SBAS162G
www.ti.com
MAXIMUM
SPECIFIED
RELATIVE ACCURACY
GAIN ERROR
PACKAGE
TEMPERATURE
PACKAGE
ORDERING
PRODUCT
(LSB)
PACKAGE-LEAD
DESIGNATOR
RANGE
MARKING
NUMBER
TSC2003
±2
±4
TSSOP-16
PW
–40
°C to +85°C
TSC2003I
TSC2003IPW
TSC2003
±2
±4
TSSOP-16
PW
–40
°C to +85°C
TSC2003I
TSC2003IPWT
TSC2003
±2
±4
TSSOP-16
PW
–40
°C to +85°C
TSC2003I
TSC2003IPWR
TSC2003
±2
±4
TSSOP-16
PW
–40
°C to +85°C
TSC2003I
TSC2003IPWRG4
TSC2003
±2
±4
VFBGA-48
ZQC
–40
°C to +85°C
BC2003
TSC2003IZQCT
TSC2003
±2
±4
VFBGA-48
ZQC
–40
°C to +85°C
BC2003
TSC2003IZQCR
NOTE: (1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet, or refer to our web
site at www.ti.com.
PIN CONFIGURATION
Top View
VFBGA
PIN DESCRIPTIONS
TSSOP
VFBGA
PIN #
NAME
DESCRIPTION
1
C1, D1
+VDD
Power Supply
2
E1
X+
X+ Position Input
3
F1
Y+
Y+ Position Input
4G1
X–
X– Position Input
5G2
Y–
Y– Position Input
6
G3, G4
GND
Ground
7G5
VBAT1
Battery Monitor Input
8G6
VBAT2
Battery Monitor Input
9B7
VREF
Voltage Reference Input/Output
10
A7
PENIRQ
Pen Interrupt. Open Drain Output (Requires
30k
to 100k pull-up resistor externally).
11
A6
SDA
Serial Data
12
A4
SCL
Serial Clock
13
A3
A1
I2C Bus Address Input A1
14
A2
A0
I2C Bus Address Input A0
15
A1
IN2
Auxiliary A/D Converter Input
16
B1
IN1
Auxiliary A/D Converter Input
ABSOLUTE MAXIMUM RATINGS(1)
+VDD to GND ........................................................................ –0.3V to +6V
Digital Input Voltage to GND ................................. –0.3V to +VDD + 0.3V
Analog Input Voltage to GND. All Pins Except 7, 8 ...... –0.3V to +VDD + 0.3V
Analog Input Voltage Pins 7, 8 to GND ........................... –0.3V to +6.0V
Operating Temperature Range ........................................ –40
°C to +85°C
Storage Temperature Range ......................................... –65
°C to +150°C
Power Dissipation .......................................................... (TJ Max – TA)/θJA
TSSOP Package
Junction Temperature (TJ Max) .............................................. +150°C
θ
JA Thermal Impedance ................................................... +115.2°C/W
Lead Temperature, Soldering
Vapor Phase (60s) ............................................................ +215
°C
Infrared (15s) ..................................................................... +220
°C
VFBGA Package
Junction Temperature (TJ Max) .............................................. +125°C
θ
JA Thermal Impedance ........................................................ +50°C/W
Lead Temperature, Soldering
Vapor Phase (60s) ............................................................ +215
°C
Infrared (15s) ..................................................................... +220
°C
NOTE: (1) Stresses above those listed under
Absolute Maximum Ratings may
cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
PACKAGE/ORDERING INFORMATION(1)
1
2
3
4
5
6
7
8
+V
DD
X+
Y+
X–
Y–
GND
V
BAT1
V
BAT2
IN1
IN2
A0
A1
SCL
SDA
PENIRQ
V
REF
16
15
14
13
12
11
10
9
TSC2003
Top View
TSSOP
NC = No Connection
NC
A
2
1
3
45
6
7
A0
IN1
IN2
+V
DD
+V
DD
X+
Y+
PENIRQ
V
REF
A1
SCL
SDA
X
Y
GND
V
BAT1
NC
B
C
D
E
F
NC
G
V
BAT2
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