參數(shù)資料
型號： TS87C51RC2-MCE
廠商： International Rectifier
英文描述： High Performance 8-bit Microcontroller
中文描述： 高性能8位微控制器
文件頁數(shù)： 72/85頁
文件大?。?/td> 762K
代理商： TS87C51RC2-MCE
72
4188E–8051–08/06
AT/TS8xC51Rx2
11.5.15
Clock Waveforms
Valid in normal clock mode. In X2 mode XTAL2 signal must be changed to XTAL2 divided by
two.
Figure 11-14.
Clock Waveforms
This diagram indicates when signals are clocked internally. The time it takes the signals to prop-
agate to the pins, however, ranges from 25 to 125 ns. This propagation delay is dependent on
variables such as temperature and pin loading. Propagation also varies from output to output
and component. Typically though (T
A
=25
°
C fully loaded) RD and WR propagation delays are
approximately 50ns. The other signals are typically 85 ns. Propagation delays are incorporated
in the AC specifications.
CLOCK
XTAL2
ALE
INTERNAL
STATE4
STATE5
STATE6
STATE1
STATE2
STATE3
STATE4
STATE5
EXTERNAL PROGRAM MEMORY FETCH
READ CYCLE
WRITE CYCLE
SERIAL PORT SHIFT CLOCK
TXD (MODE 0)
PORT OPERATION
PSEN
P0
P2 (EXT)
RD
P0
P2
P0
P2
WR
RXD SAMPLED
RXD SAMPLED
P0 PINS SAMPLED
P1, P2, P3 PINS SAMPLED
P1, P2, P3 PINS SAMPLED
P0 PINS SAMPLED
MOV DEST PORT (P1, P2, P3)
(INCLUDES INT0, INT1, TO, T1)
MOV DEST P0
OLD DATA
NEW DATA
DPL OR Rt OUT
DATA OUT
PCL OUT (EVEN IF PROGRAM
MEMORY IS INTERNAL)
PCL OUT (IF PROGRAM
MEMORY IS EXTERNAL)
INDICATES DPH OR P2 SFR TO PCH TRANSITION
DPL OR Rt OUT
FLOAT
PCL OUT (IF PROGRAM
MEMORY IS EXTERNAL)
INDICATES DPH OR P2 SFR TO PCH TRANSITION
INDICATES ADDRESS TRANSITIONS
FLOAT
FLOAT
FLOAT
PCL OUT
PCL OUT
PCL OUT
DATA
SAMPLED
DATA
SAMPLED
DATA
SAMPLED
THESE SIGNALS ARE NOT ACTIVATED DURING THE
EXECUTION OF A MOVX INSTRUCTION
P1P2
P1P2
P1P2
P1P2
P1P2
P1P2
P1P2
P1P2
相關(guān)PDF資料
PDF描述
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