參數(shù)資料
型號(hào)： TS86101G2BMGS
廠商： E2V TECHNOLOGIES PLC
元件分類(lèi)： DAC
英文描述： PARALLEL, WORD INPUT LOADING, 10-BIT DAC, CBGA255
封裝： CI-CGA, 255 PIN
文件頁(yè)數(shù)： 16/57頁(yè)
文件大?。?/td> 1030K
代理商： TS86101G2BMGS
23
0992D–BDC–04/09
e2v semiconductors SAS 2009
TS86101G2B
Case 1:
If the D_CK clock edge occurs before the forbidden zone, data N will be transferred internally from the
first to the second bank of latch (see Figure 8-2 on page 30).
Case 2:
If the D_CK clock edge occurs after the forbidden zone, data N +1 will be transferred internally from the
first to the second bank of latch (see Figure 8-2 on page 30).
5.3.1
Tuning the DSP Clock Output Phase
The DSP clock output phase may be tuned over a range of 3.1 ns in 15 discrete steps of 200 ps each,
plus a propagation delay of 2.1 ns (the 2.10 ns value is an absolute timing value measured from CW_IN
input ball to DSP Clock output ball), by correctly setting the 4-bit address input CS_0, CS_1, CS_2 and
CS_3 from 0000 to 1111:
– 0000: 2.1 ns + 0
– 0001: 2.1 ns + 200 ps
–…
– 1111: 2.1 ns + 3.1 ns
5.3.2
Analog Output Data Switching Information
The analog output data changes on the CW_IN master clock’s rising edge, after one clock cycle pipeline
delay, plus TOD (output propagation delay). TOD includes the following:
Propagation time delays of the packaging accesses
The DAC’s core internal conversion time and other internal propagation delays
The typical value of TOD is 3.7 ns, assuming a 50
Ω // 2 pF load.
6.
Main Features of the TS86101G2B
6.1
Input MUX
The 4:1 integrated input MUX of the TS86101G2B provides the user with the capacity to apply an input
data rate four times lower than the effective sampling frequency used:
Data rate = Fs/4 = F(DSP_CK) = F(D_CK)
Where:
– F(DSP_CK) is the frequency of the DSP output clock
– F(D_CK) is the frequency of the Data Ready input clock
Since this input MUX is not programmable, all four ports must be used for proper operation of the DAC.
相關(guān)PDF資料
PDF描述
TS86101G2BVGL PARALLEL, WORD INPUT LOADING, 10-BIT DAC, CBGA255
TS86101G2BCGL PARALLEL, WORD INPUT LOADING, 10-BIT DAC, CBGA255
TSA0801IF 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48
TSA0801CFT 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48
TSA0801CF 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TS86101G2BVGL 制造商:e2v technologies 功能描述:10-BIT DAC MUXDAC 10-BIT 1.2 GSPS - Trays
TS861AI 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:RAIL TO RAIL MICROPOWER BICMOS COMPARATORS
TS861AID 功能描述:校驗(yàn)器 IC Single Rail-to-Rail RoHS:否 制造商:STMicroelectronics 產(chǎn)品: 比較器類(lèi)型: 通道數(shù)量: 輸出類(lèi)型:Push-Pull 電源電壓-最大:5.5 V 電源電壓-最小:1.1 V 補(bǔ)償電壓（最大值）:6 mV 電源電流（最大值）:1350 nA 響應(yīng)時(shí)間: 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SC-70-5 封裝:Reel
TS861AIDT 功能描述:校驗(yàn)器 IC Single Rail-to-Rail RoHS:否 制造商:STMicroelectronics 產(chǎn)品: 比較器類(lèi)型: 通道數(shù)量: 輸出類(lèi)型:Push-Pull 電源電壓-最大:5.5 V 電源電壓-最小:1.1 V 補(bǔ)償電壓（最大值）:6 mV 電源電流（最大值）:1350 nA 響應(yīng)時(shí)間: 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SC-70-5 封裝:Reel
TS861AILT 功能描述:校驗(yàn)器 IC Single Rail-to-Rail RoHS:否 制造商:STMicroelectronics 產(chǎn)品: 比較器類(lèi)型: 通道數(shù)量: 輸出類(lèi)型:Push-Pull 電源電壓-最大:5.5 V 電源電壓-最小:1.1 V 補(bǔ)償電壓（最大值）:6 mV 電源電流（最大值）:1350 nA 響應(yīng)時(shí)間: 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SC-70-5 封裝:Reel
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*