參數(shù)資料
型號(hào): TS83148MZ
元件分類(lèi): ADC
英文描述: 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CDSO28
封裝: CERAMIC, DFP-28
文件頁(yè)數(shù): 12/16頁(yè)
文件大小: 551K
代理商: TS83148MZ
TS83148
5/16
EXPLANATION OF TEST LEVELS
I
100% production tested at +25
°C
II
100 % production tested at +25
°C, and sample tested at specified temperatures
(AC testing done on sample)
III
Sample tested only
IV
Parameter is guaranteed by design and characterization testing
V
Parameter is a typical value only
VI
All devices are 100 % production tested at +25
°C. 100 % production tested at temperature
extremes for military temperature devices, guaranteed by design and characterization testing for
(civil) and industrial devices.
D
100 % probe tested on wafer at +25
°C
Only MIN and MAX values are tested and guaranted (typical values are not tested).
10. TS83148 BLOCK DIAGRAM
INTERPOLATION
STAGES
DECODE AND OVERRANGE
LOGIC
OUTPUT BUFFERS
AMP.
BANK
BANDGAP
REF
2.5 V
16
2
6
8
T/H
VIN
Digital Outputs
Over Range
NAP
VOUT
INTERNAL
BIASING
4 BIT
COARSE
ADC
VREF
CLOCK
BUFFER
TS
CONTROL
TS
1
4+1
CLK
TS is inactivated when tied at GND. If TS is connected to VCC, output data will be set in high impedance mode.
NAP is inactivated when tied at GND. If NAP is connected to VCC, bandgap references will be inhibited, digital output will
be in high impedance mode (TS) and power consumption will be lower than 8 mA.
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PDF描述
TS83148VS 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
TS83148VZT 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CDFP28
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