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參數(shù)資料
| 型號(hào)： | TPS730XX |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | LOW-NOISE, HIGH PSRR, RF 200-mA LOW-DROPOUT LINEAR REGULATORS |
| 中文描述： | 低噪聲，高PSRR，射頻200毫安低壓降線性穩(wěn)壓器 |
| 文件頁數(shù)： | 8/13頁 |
| 文件大?。?/td> | 323K |
| 代理商： | TPS730XX |
www.ti.com
Power Dissipation and Junction Temperature
Specified regulator operation is assured to a junction temperature of +125
°
C; the maximum junction temperature
should be restricted to +125
°
C under normal operating conditions. This restriction limits the power dissipation the
regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, P
D(max)
, and the actual dissipation, P
D
, which must be less than or
equal to P
D(max)
.
The maximum power dissipation limit is determined using
Equation 1
:
P
D(max)
T
J
max
T
A
R
JA
(1)
P
D
V
IN
V
OUT
I
OUT
(2)
Programming the TPS73001 Adjustable LDO Regulator
The output voltage of the TPS73001 adjustable regulator is programmed using an external resistor divider as
shown in
Figure 17
. The output voltage is calculated using
Equation 3
:
V
OUT
V
REF
1
R
1
R
2
(3)
R =
-
1
′
R
2
V
OUT
V
REF
(4)
C
1
(3 x 10
7
) x (R
1
(R
1
x R
2
)
R
2
)
(5)
TPS730xx
SBVS054H–NOVEMBER 2004–REVISED OCTOBER 2007
Where:
T
J
max is the maximum allowable junction temperature.
R
θ
JA
is the thermal resistance junction-to-ambient for the package (see the
Dissipation Ratings Table
).
T
A
is the ambient temperature.
The regulator dissipation is calculated using
Equation 2
:
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the thermal
protection circuit.
Where:
V
REF
= 1.225V typ (the internal reference voltage)
Resistors R
1
and R
2
should be chosen for approximately 50
μ
A divider current. Lower value resistors can be used
for improved noise performance, but the solution consumes more power. Higher resistor values should be
avoided as leakage current into/out of
FB
across
increases/decreases the feedback voltage and thus erroneously decreases/increases V
OUT
. The recommended
design procedure is to choose R
2
= 30.1k
to set the divider current at 50
μ
A, C
1
= 15pF for stability, and then
calculate R
1
using
Equation 4
:
R
1
/R
2
creates
an
offset
voltage
that
artificially
In order to improve the stability of the adjustable version, it is suggested that a small compensation capacitor be
placed between OUT and FB. For voltages < 1.8V, the value of this capacitor should be 100pF. For voltages >
1.8V, the approximate value of this capacitor can be calculated as shown in
Equation 5
:
The suggested value of this capacitor for several resistor ratios is shown in the table below. If this capacitor is
not used (such as in a unity-gain configuration) or if an output voltage < 1.8V is chosen, then the minimum
recommended output capacitor is 4.7
μ
F instead of 2.2
μ
F.
8
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Copyright 2004–2007, Texas Instruments Incorporated
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參數(shù)描述 |
|---|---|
| TPS73101DBVR | 功能描述:低壓差穩(wěn)壓器 - LDO Cap Free NMOS 150mA RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| TPS73101DBVRG4 | 功能描述:低壓差穩(wěn)壓器 - LDO Cap Free NMOS 150mA RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| TPS73101DBVT | 功能描述:低壓差穩(wěn)壓器 - LDO Cap Free NMOS 150mA RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| TPS73101DBVT | 制造商:Texas Instruments 功能描述:V REG LDO 0.15A 73101 SOT-23-5 |
| TPS73101DBVTG4 | 功能描述:低壓差穩(wěn)壓器 - LDO Cap Free NMOS 150mA RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
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