參數(shù)資料
型號: TPS62421DRC
廠商: TEXAS INSTRUMENTS INC
元件分類: 穩(wěn)壓器
英文描述: 1.61 A DUAL SWITCHING CONTROLLER, 2500 kHz SWITCHING FREQ-MAX, PDSO10
封裝: 3 X 3 MM, PLASTIC, SON-10
文件頁數(shù): 11/37頁
文件大小: 1020K
代理商: TPS62421DRC
www.ti.com
SLVS676C – JUNE 2006 – REVISED JUNE 2010
Table 1. Addressable Registers for Fixed Output Voltage Options (PIN DEF_1 = digital input)
DEVICE
REGISTER
DESCRIPTION
DEF_1
A1
A0
D4
D3
D2
D1
D0
PIN
REG_DEF_1_High
Converter 1 output voltage setting for
high
0
1
Output voltage setting, see
DEF_1 = High condition. The content of the
Table 4
register is active with DEF1_ Pin high.
REG_DEF_1_Low
Converter 1 output voltage setting
low
0
Output voltage setting, see
TPS62421
Table 4
REG_DEF_2
Converter 2 output voltage
n/a
1
0
Output voltage setting, see
Table 6
Don’t’ use
1
Table 2. Addressable Registers for Adjustable Output Voltage Devices
REGISTER
DESCRIPTION
A1
A0
D4
D3
D2
D1
D0
REG_DEF_1_High
Not available in TPS62420 adjustable version
0
1
REG_DEF_1_Low
Converter 1 output voltage setting
0
TPS62420 see Table 5
REG_DEF_2
Converter 2 output voltage
1
0
TPS62420 see Table 6, connect ADJ2
pin directly to VOUT2
Don’t use
1
Bit Decoding
The bit detection is based on a PWM scheme, where the criterion is the relation between tLOW and tHIGH. It can
be simplified to:
High Bit: tHigh > tLow, but with tHigh at least 2x tLow, see Figure 31
Low Bit: tLow> tHigh, but with tLow at least 2x tHigh, see Figure 31
The bit detection starts with a falling edge on the MODED/DATA pin and ends with the next falling edge.
Depending on the relation between tLow and tHigh a 0 or 1 is detected.
Acknowledge
The Acknowledge condition is only applied if:
Acknowledge is requested by a set RFA bit
The transmitted device address matches with the device address of the device
16 bits were received correctly
In this case, the device turns on the internal ACKN-MOSFET and pulls the MODE/DATA pin low for the time
tACKN, which is max. 520ms. The Acknowledge condition is valid after an internal delay time tvalACK. This means
the internal ACKN-MOSFET is turned on after tvalACK, when the last falling edge of the protocol was detected.
The master controller keeps the line low during this time.
The master device can detect the acknowledge condition with it’s input by releasing the MODE/DATA pin after
tvalACK and read back a 0.
In case of an invalid device address or not correctly received protocol, no acknowledge condition will be applied,
thus the internal MOSFET will not be turned on and the external pullup resistor pulls MODE/DATA pin high after
tvalACK. The MODE/DATA pin can be used again after the acknowledge condition ends.
NOTE
The acknowledge condition may only be requested in case the master device has an open
drain output.
In case of a push pull output stage it is recommended to use a series resistor in the MODE/DATA line to limit the
current to 500mA in case of an accidentally requested acknowledge to protect the internal ACKN-MOSFET.
Copyright 2006–2010, Texas Instruments Incorporated
19
Product Folder Link(s): TPS62420 TPS62421
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