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參數(shù)資料
| 型號： | TPS61122PWRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 1.6 A BATTERY CHARGE CONTROLLER, 600 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封裝： | GREEN, PLASTIC, TSSOP-16 |
| 文件頁數(shù)： | 9/31頁 |
| 文件大?。?/td> | 867K |
| 代理商： | TPS61122PWRG4 |
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DETAILED DESCRIPTION
Controller Circuit
Synchronous Rectifier
Power Save Mode
LDO
Device Enable
TPS61120
TPS61122, TPS61121
SLVS427C – JUNE 2002 – REVISED APRIL 2004
Output Capacitor LDO
To ensure stable output regulation, it is required to use an output capacitor at the LDO output. Ceramic
capacitors in the range from 1 F up to 4.7 F is recommended. At 4.7 F and above it is recommended to use
standard ESR tantalum. There is no maximum capacitance value.
The controller circuit of the device is based on a fixed frequency multiple feedforward controller topology. Input
voltage, output voltage, and voltage drop on the NMOS switch are monitored and forwarded to the regulator. So
changes in the operating conditions of the converter directly affect the duty cycle and must not take the indirect
and slow way through the control loop and the error amplifier. The control loop, determined by the error amplifier,
only has to handle small signal errors. The input for it is the feedback voltage on the FB pin or, at fixed output
voltage versions, the voltage on the internal resistor divider. It is compared with the internal reference voltage to
generate an accurate and stable output voltage.
The peak current of the NMOS switch is also sensed to limit the maximum current flowing through the switch and
the inductor. The typical peak current limit is set to 1300 mA. An internal temperature sensor prevents the device
from getting overheated in case of excessive power dissipation.
The device integrates an N-channel and a P-channel MOSFET transistor to realize a synchronous rectifier.
Because the commonly used discrete Schottky rectifier is replaced with a low RDS(ON) PMOS switch, the power
conversion efficiency reaches 95%. To avoid ground shift due to the high currents in the NMOS switch, two
separate ground pins are used. The reference for all control functions is the GND pin. The source of the NMOS
switch is connected to PGND. Both grounds must be connected on the PCB at only one point close to the GND
pin. A special circuit is applied to disconnect the load from the input during shutdown of the converter. In
conventional synchronous rectifier circuits, the backgate diode of the high-side PMOS is forward biased in
shutdown and allows current flowing from the battery to the output. This device however uses a special circuit
which takes the cathode of the backgate diode of the high-side PMOS and disconnects it from the source when
the regulator is not enabled (EN = low).
The benefit of this feature for the system design engineer is that the battery is not depleted during shutdown of
the converter. No additional components have to be added to the design to make sure that the battery is
disconnected from the output of the converter.
The SKIPEN pin can be used to select different operation modes. To enable the Power save mode, SKIPEN
must be set high. Power save mode is used to improve efficiency at light loads. In power save mode, the
converter only operates when the output voltage trips below a set threshold voltage. It ramps up the output
voltage with several pulses, and goes again into power save mode once the output voltage exceeds the set
threshold voltage. The skip mode can be disabled by setting the SKIPEN to GND.
The built-in LDO can be used to generate a second output voltage derived from the dc/dc converter output, from
the battery, or from another power source like an ac adapter or a USB power rail. The LDO is capable of being
back biased. This allows the user to just connect the outputs of dc/dc converter and LDO. So the device is able
to supply the load via dc/dc converter when the energy comes from the battery and efficiency is most important
and from another external power source via the LDO when lower efficiency is not critical. The LDO must be
disabled if the LDOIN voltage drops below LDOOUT to block reverse current flowing. The status of the dc/dc
stage (enabled or disabled) does not matter.
The device is put into operation when EN is set high. It is put into a shutdown mode when EN is set to GND. In
shutdown mode, the regulator stops switching, all internal control circuitry including the low-battery comparator is
switched off, and the load is isolated from the input (as described in the Synchronous Rectifier Section). This
also means that the output voltage can drop below the input voltage during shutdown.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TPS61130 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:SYNCHRONOUS SEPIC / FLYBACK CONVERTER WITH 1.1A SWITCH AND INTEGRATED LDO |
| TPS61130EVM-206 | 功能描述:電源管理IC開發(fā)工具 TPS61130-206 Eval Mod RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
| TPS61130PW | 功能描述:直流/直流開關(guān)調(diào)節(jié)器 Adj 90% Eff SEPIC Converter RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
| TPS61130PWG4 | 功能描述:直流/直流開關(guān)調(diào)節(jié)器 Adj 90% Eff SEPIC Converter RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
| TPS61130PWR | 功能描述:直流/直流開關(guān)調(diào)節(jié)器 Adj 90% Eff SEPIC Converter RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
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