參數(shù)資料
型號： TPS54974PWPG4
廠商： TEXAS INSTRUMENTS INC
元件分類： 穩(wěn)壓器
英文描述： 16 A SWITCHING REGULATOR, 762 kHz SWITCHING FREQ-MAX, PDSO28
封裝： GREEN, PLASTIC, HTSSOP-28
文件頁數(shù)： 3/21頁
文件大?。?/td> 743K
代理商： TPS54974PWPG4
www.ti.com
LAYOUT CONSIDERATIONS FOR THERMAL
PERFORMANCE GRAPHS
50
55
60
65
70
75
80
85
90
95
100
0
1
2
3
4
5
6
7
8
9
10
IO Output Current A
Efficiency
%
VIN = 3.3 V,
PVIN = 2.5 V,
VO = 1.8 V,
fs= 700 kHz
0.5
0.4
0.3
0.2
0.1
0
0.1
0.2
0.3
0.4
0.5
0
1
2
3
4
5
6
7
8
9
10
IO Output Current A
Output
V
oltage
Change
%
0.5
0.4
0.3
0.2
0.1
0
0.1
0.2
0.3
0.4
0.5
3
3.2
3.4
3.6
3.8
4
IO = 0 A
IO = 4.5 A
IO = 9 A
VI(VIN) VIN Input Voltage V
Output
V
oltage
Change
%
Vphase
1
V/div
Vout
10
mV/div
1
s/div
25
35
45
55
65
75
85
95
105
115
125
Ambient
T
emperature
C°
IO Output Current A
0
2
4
6
8
10
12
14
16
PVIN = 2.5 V,
fs = 700 kHz,
TJ = 125°C,
VIN = 3.3 V,
VO = 1.8 V
Safe Operating Area
0.5
0.4
0.3
0.2
0.1
0
0.1
0.2
0.3
0.4
0.5
2.2
2.4
2.6
2.8
IO = 0 A
IO = 4.5 A
IO = 9 A
VI(PVIN) PVIN Input Voltage V
Output
V
oltage
Change
%
TPS54974
SLVS458B – JANUARY 2003 – REVISED FEBRUARY 2005
any area available must be used when 6-A or greater
PERFORMANCE
operation is desired. Connection from the exposed
area of the PowerPAD to the analog ground plane
For operation at full rated load current, the analog
layer must be made using 0.013-inch diameter vias to
ground plane must provide an adequate heat dissi-
avoid solder wicking through the vias.
pating area. A 3-inch by 3-inch plane of 1-ounce
copper is recommended, though not mandatory, de-
Eight vias must be in the PowerPAD area with four
pending on ambient temperature and airflow. Most
additional vias located under the device package. The
applications have larger areas of internal ground
size of the vias under the package, but not in the
plane available, and the PowerPAD must be connec-
exposed thermal pad area, can be increased to
ted to the largest area available. Additional areas on
0.018-inch. Additional vias, beyond the twelve rec-
the top or bottom layers also help dissipate heat, and
ommended that enhance thermal performance, must
be included in areas not under the device package.
Data shown is for the circuit of Figure 10. All data is for VIN = 3.3 V, PVIN = 2.5 V, VOUT = 1.8 V, fs = 700 kHz,
and TA = 25°C, unless otherwise specified
EFFICIENCY
OUTPUT VOLTAGE CHANGE
vs
OUTPUT CURRENT
VIN INPUT VOLTAGE
Figure 13.
Figure 14.
Figure 15.
OUTPUT VOLTAGE CHANGE
AMBIENT TEMPERATURE
vs
PVIN INPUT VOLTAGE
LOAD CURRENT(1)
OUTPUT RIPPLE VOLTAGE
Figure 16.
Figure 17.
Figure 18.
11
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