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參數(shù)資料
| 型號： | TPS5211PWP |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | HIGH FREQUENCY PROGRAMMABLE HYSTERETIC REGULATOR CONTROLLER |
| 中文描述： | 可編程滯高頻穩(wěn)壓控制器 |
| 文件頁數(shù)： | 12/32頁 |
| 文件大?。?/td> | 469K |
| 代理商： | TPS5211PWP |
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TPS5211
HIGH FREQUENCY PROGRAMMABLE HYSTERETIC
REGULATOR CONTROLLER
SLVS243 – SEPTEMBER 1999
12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
switching characteristics over recommended operating virtual-junction temperature range,
V
CC
= 12 V, I
DRV
= 0 A (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VSENSE to HIGHDR or
LOWDR (excluding dead-
time)
1.3 V
≤
VVREF
≤
3.5 V, 10 mV overdrive
(see Note 3)
150
250
1.3 V
≤
VVREF
≤
3.5 V, 20 mV overdrive
1.3 V
≤
VVREF
≤
3.5 V, 30 mV overdrive
1.3 V
≤
VVREF
≤
3.5 V, 40 mV overdrive
200
ns
190
Propagation delay
180
OCP comparator
1
OVP comparator
See Note 3
1
μ
s
PWRGD comparator
1
SLOWST comparator
Overdrive = 10 mV (see Note 3)
560
900
ns
HIGHDR output
CL = 50 pF,
CL = 3 nF
CL = 50 pF
CL = 3 nF
CL = 50 pF,
CL = 3 nF
CL = 50 pF
CL = 3 nF
VBOOTLO = 0 V
8
Rise time
35
ns
LOWDR output
8
40
HIGHDR output
VBOOTLO = 0 V
TBD
Fall time
35
ns
LOWDR output
TBD
40
Deglitch time (Includes
comparator propagation
delay)
OCP
See Note 3
2
5
μ
s
OVP
2
5
VHISENSE = 12 V,
VIOUTLO pulsed from 12 V to 11.9 V,
100 ns rise/fall times
(see Note 3)
2
Response time
High-side VDS sensing
VHISENSE = 4.5 V,
VIOUTLO pulsed from 4.5 V to 4.4 V,
100 ns rise/fall times (see Note 3)
3
μ
s
VHISENSE = 3 V,
VIOUTLO pulsed from 3 V to 2.9 V,
100 ns rise/fall times (see Note 3)
3
Short-circuit protection
rising-edge delay
SCP
LOSENSE = 0 V (see Note 3)
300
500
ns
Turnon/turnoff delay
VDS sensing sample/hold
switch
3 V
≤
VHISENSE
≤
11 V,
VLOSENSE = VHISENSE (see Note 3)
30
100
ns
Crossover delay time
LOWDR to HIGHDRV, and
LOHIB to LOWDR
See Note 3
30
100
ns
Prefilter pole frequency
Hysteretic comparator
See Note 3
5
MHz
Propagation delay
NOTE 3: This parameter is ensured by design and is not production tested.
LODRV
See Note 3
400
ns
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