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參數(shù)資料
| 型號(hào)： | TPS3600D50PWRG4 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS |
| 中文描述： | 電池備份監(jiān)事的低功耗處理器 |
| 文件頁(yè)數(shù)： | 5/26頁(yè) |
| 文件大小： | 510K |
| 代理商： | TPS3600D50PWRG4 |
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SLVS336B DECEMBER 2000 REVISED JANUARY 2007
5
timing diagram
t
t
t
t
t
V(BOK)
V(SWP)
V(SWN)
V(IT)
VOUT
V(SWN)
RESET
BATTOK
1
0
BATTON
VBAT
VDD
VBAT
VDD
VBAT
VDD
VBAT
NOTES: A. MSWITCH = 0, MR = 1
NOTES: B. Timing diagram shown under normal operation, not in freshness seal mode.
www.ti.com
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