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| 型號： | TPS3600D50PWRG4 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS |
| 中文描述： | 電池備份監(jiān)事的低功耗處理器 |
| 文件頁數(shù)： | 14/26頁 |
| 文件大小： | 510K |
| 代理商： | TPS3600D50PWRG4 |
SLVS336B DECEMBER 2000 REVISED JANUARY 2007
14
TYPICAL CHARACTERISTICS
Figure 5
0.8
0.9
1
1.1
1.2
1.3
1.4
1.5
50
76
100
125
150
175
200
STATIC DRAIN SOURCE ON-STATE RESISTANCE
(V
DD
TO V
OUT
)
vs
OUTPUT CURRENT
IO Output Current mA
TA = 40
°
C
TA = 25
°
C
TA = 85
°
C
TA = 0
°
C
VDD = 3.3 V
VBAT = GND
MSWITCH = GND
rD
)
V
(
Figure 6
0.9
1
1.1
1.2
1.3
1.4
1.5
1.6
50
75
100
125
150
175
200
IO Output Current mA
TA = 40
°
C
TA = 25
°
C
TA = 85
°
C
TA = 0
°
C
VBAT = 3.3 V
MSWITCH = VDD
STATIC DRAIN SOURCE ON-STATE RESISTANCE
(V
BAT
TO V
OUT
)
vs
OUTPUT CURRENT
rD
)
V
(
rD
(
Figure 7
0
5
10
15
20
25
30
35
40
0
1
2
3
4
5
STATIC DRAIN SOURCE ON-STATE RESISTANCE
(CEIN to CEOUT)
vs
CHIP-ENABLE INPUT VOLTAGE
VCEIN Chip-Enable Input Voltage V
TA = 40
°
C
TA = 25
°
C
TA = 85
°
C
TA = 0
°
C
ICEOUT = 5 mA
VDD = 5 V
MSWITCH = GND
Figure 8
0
1
2
3
4
5
6
7
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
TA = 40
°
C
TA = 25
°
C
TA = 85
°
C
TA = 0
°
C
I
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
A
μ
VDD Supply Voltage V
VBAT Mode
VBAT = 5 V
MSWITCH = GND
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