參數(shù)資料
型號: TMX32C6411GLZ
廠商: Texas Instruments, Inc.
英文描述: Anti-Static Storage Bags; External Height:5"; External Width:3"; Thickness:0.12"
中文描述: 定點數(shù)字信號處理器
文件頁數(shù): 33/119頁
文件大?。?/td> 1742K
代理商: TMX32C6411GLZ
SPRS196H MARCH 2002 REVISED JULY 2004
33
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
DEVICE CONFIGURATIONS (CONTINUED)
Table 20. PCI_EN Peripheral Selection (HPI/GP[15:9] or PCI)
PCI_EN Pi
n
[AA4]
PERIPHERALS SELECTED
HPI
GP[15:9]
PCI
DESCRIPTION
0
[default] HPI is enabled, GP[15:9] pins can be programmed as GPIO, PCI is
disabled.
This means all multiplexed HPI/PCI pins function as HPI and all standalone PCI
pins (PCBE0, XSP_DO, XSP_DI, XSP_CLK, and XSP_CS) are tied-off (Hi-Z).
Also, the multiplexed GPIO/PCI pins can be used as GPIO with the proper
software configuration of the GPIO enable (GPxEN) and direction (GPxDIR)
registers (for more details, see Table 22).
1
PCI is enabled, HPI/GP[15:9] are disabled.
This means all multiplexed HPI/PCI pins function as PCI. Also, the multiplexed
GPIO/PCI pins function as PCI pins (for more details, see Table 22).
Auto-initialization through PCI EEPROM or initialization via specified PCI default
values is controlled by the EEAI pin, see Table 21.
The PCI_EN pin is latched at reset and
must
be driven valid at all times and the user
must not
switch values throughout device operation.
other device configurations
Table 21 describes the C6411 device configuration pins, which are set up via external pullup/pulldown resistors
through the specified pins. For more details on these device configuration pins, see the Terminal Functions table
and the Debugging Considerations section.
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