參數(shù)資料
型號(hào)： TMX320F28044ZGMS
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號(hào)處理
英文描述： Digital Signal Processor
中文描述： 數(shù)字信號(hào)處理器
文件頁(yè)數(shù)： 89/107頁(yè)
文件大小： 784K
代理商： TMX320F28044ZGMS
www.ti.com
ADCSOCAO
or
ADCSOCBO
t
w(ADCSOCAL)
6.10.3 External Interrupt Timing
XNMI, XINT1, XINT2
t
w(INT)
Interrupt Vector
t
d(INT)
Address bus
(internal)
TMS320F28044
Digital Signal Processor
SPRS357B–AUGUST 2006–REVISED MAY 2007
Table 6-21. High Resolution PWM Characteristics at SYSCLKOUT = (60 - 100 MHz)
MIN
TYP
150
MAX
310
UNIT
ps
Micro Edge Positioning (MEP) step size
(1)
(1)
Maximum MEP step size is based on worst-case process, maximum temperature and maximum voltage. MEP step size will increase
with low voltage and high temperature and decrease with voltage and cold temperature.
Applications that use the HRPWM feature should use MEP Scale Factor Optimizer (SFO) estimation software functions. See the TI
software libraries for details of using SFO function in end applications. SFO functions help to estimate the number of MEP steps per
SYSCLKOUT period dynamically while the HRPWM is in operation.
Table 6-22. External ADC Start-of-Conversion Switching Characteristics
PARAMETER
Pulse duration, ADCSOCAO low
MIN
MAX
UNIT
cycles
t
w(ADCSOCAL)
32t
c(HCO)
Figure 6-14. ADCSOCAO or ADCSOCBO Timing
Figure 6-15. External Interrupt Timing
Table 6-23. External Interrupt Timing Requirements
(1)
TEST CONDITIONS
Synchronous
With qualifier
MIN
MAX
UNIT
cycles
cycles
t
w(INT)(2)
Pulse duration, INT input low/high
1t
c(SCO)
1t
c(SCO)
+ t
w(IQSW)
(1)
(2)
For an explanation of the input qualifier parameters, see
Table 6-11
.
This timing is applicable to any GPIO pin configured for ADCSOC functionality.
Table 6-24. External Interrupt Switching Characteristics
(1)
PARAMETER
MIN
MAX
UNIT
cycles
t
d(INT)
(1)
Delay time, INT low/high to interrupt-vector fetch
t
w(IQSW)
+ 12t
c(SCO)
For an explanation of the input qualifier parameters, see
Table 6-11
.
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Electrical Specifications
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