參數(shù)資料
型號: TMS6641648
廠商: Texas Instruments, Inc.
英文描述: 4 194 304 BY 4-BIT/2 097 152 BY 8-BIT/1 048 576 BY 16-BIT BY 4-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES
中文描述: 4 194 304 4位/ 2 097 152 8位/ 1 048 576由16位4,銀行同步動態(tài)隨機存取記憶體
文件頁數(shù): 46/56頁
文件大?。?/td> 958K
代理商: TMS6641648
TMS664414, TMS664814, TMS664164
4 194 304 BY 4-BIT/2 097 152 BY 8-BIT/1 048 576 BY 16-BIT BY 4-BANK
SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES
SMOS695A – APRIL 1998 – REVISED JULY 1998
46
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
PARAMETER MEASUREMENT INFORMATION
WRT-P_0
d
c
CKE
CS
A0–A9
A10
A11
A12
A13
W
CAS
RAS
DQMx
DQ
CLK
C1
R1
R1
R1
C0
R0
R0
R0
h
g
f
e
b
a
ACTV_0
HOLD
READ-P_3
ACTV_3
tRCD
nCLE
BURST
TYPE
BANK
ROW
BURST CYCLE
(D/Q)
(0–3)
ADDR
a
b
c
d
e
f
g
h
Q
3
R0
C0
C0+1
C0+2
C0+3
D
0
R1
C1
C1+1
C1+2
C1+3
Column-address sequence depends on programmed burst type and starting addresses C0 and C1 (see Table 5).
NOTES: A. This example illustrates minimum tRCD and tAPW for the ’664xx4 at 100 MHz.
B. If entering the PDE command with violation of short tAPW, the device is still entering the power-down mode and then both
banks are deactivated (still in power-down mode).
Figure 36. Use of CKE for Clock Gating (Hold) and Standby Mode
(Read-Burst Bank 3 With Hold, Write-Burst Bank 0, Standby Mode)
(CAS latency = 2, burst length = 4)
相關PDF資料
PDF描述
TMS6641648A 4 194 304 BY 4-BIT/2 097 152 BY 8-BIT/1 048 576 BY 16-BIT BY 4-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES
TMS66441410 4 194 304 BY 4-BIT/2 097 152 BY 8-BIT/1 048 576 BY 16-BIT BY 4-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES
TMS6644148 4 194 304 BY 4-BIT/2 097 152 BY 8-BIT/1 048 576 BY 16-BIT BY 4-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES
TMS6644148A 4 194 304 BY 4-BIT/2 097 152 BY 8-BIT/1 048 576 BY 16-BIT BY 4-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES
TMS99534A FREQUENCY-SHITF-KEYED MODEM
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