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TMS320F2809, TMS320F2808, TMS320F2806
TMS320F2802, TMS320F2801
TMS320C2802, TMS320C2801, and TMS320F2801x DSPs
SPRS230J–OCTOBER 2003–REVISED SEPTEMBER 2007
6-3
TMS320F2802, TMS320F2801 Current Consumption by Power-Supply Pins at 100-MHz SYSCLKOUT
............
95
TMS320C2802, TMS320C2801 Current Consumption by Power-Supply Pins at 100-MHz SYSCLKOUT
...........
96
Typical Current Consumption by Various Peripherals (at 100 MHz)
......................................................
97
TMS320x280x Clock Table and Nomenclature (100-MHz Devices)
......................................................
101
TMS320x280x Clock Table and Nomenclature (60-MHz Devices)
.......................................................
102
Input Clock Frequency
..........................................................................................................
103
XCLKIN Timing Requirements - PLL Enabled
...............................................................................
103
XCLKIN Timing Requirements - PLL Disabled
..............................................................................
103
XCLKOUT Switching Characteristics (PLL Bypassed or Enabled)
.......................................................
103
Power Management and Supervisory Circuit Solutions
....................................................................
104
Reset (XRS) Timing Requirements
...........................................................................................
106
General-Purpose Output Switching Characteristics
.........................................................................
107
General-Purpose Input Timing Requirements
...............................................................................
108
IDLE Mode Timing Requirements
.............................................................................................
110
IDLE Mode Switching Characteristics
.........................................................................................
110
STANDBY Mode Timing Requirements
......................................................................................
110
STANDBY Mode Switching Characteristics
.................................................................................
111
HALT Mode Timing Requirements
............................................................................................
111
HALT Mode Switching Characteristics
.......................................................................................
112
ePWM Timing Requirements
...................................................................................................
113
ePWM Switching Characteristics
..............................................................................................
113
Trip-Zone input Timing Requirements
........................................................................................
113
High Resolution PWM Characteristics at SYSCLKOUT = (60 - 100 MHz)
..............................................
114
Enhanced Capture (eCAP) Timing Requirement
............................................................................
114
eCAP Switching Characteristics
...............................................................................................
114
Enhanced Quadrature Encoder Pulse (eQEP) Timing Requirements
....................................................
114
eQEP Switching Characteristics
...............................................................................................
114
External ADC Start-of-Conversion Switching Characteristics
..............................................................
114
External Interrupt Timing Requirements
......................................................................................
115
External Interrupt Switching Characteristics
.................................................................................
115
I2C Timing
.......................................................................................................................
116
SPI Master Mode External Timing (Clock Phase = 0)
......................................................................
117
SPI Master Mode External Timing (Clock Phase = 1)
......................................................................
119
SPI Slave Mode External Timing (Clock Phase = 0)
........................................................................
120
SPI Slave Mode External Timing (Clock Phase = 1)
........................................................................
121
ADC Electrical Characteristics (over recommended operating conditions)
..............................................
123
ADC Power-Up Delays
..........................................................................................................
124
Current Consumption for Different ADC Configurations (at 12.5-MHz ADCCLK)
.......................................
124
Sequential Sampling Mode Timing
............................................................................................
126
Simultaneous Sampling Mode Timing
........................................................................................
127
Flash Endurance
.................................................................................................................
129
6-4
6-5
6-6
6-7
6-8
6-9
6-10
6-11
6-12
6-13
6-14
6-15
6-16
6-17
6-18
6-19
6-20
6-21
6-22
6-23
6-24
6-25
6-26
6-27
6-28
6-29
6-30
6-31
6-32
6-33
6-34
6-35
6-36
6-37
6-38
6-39
6-40
6-41
6-42
6-43
List of Tables
7