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TMS320F28044
Digital Signal Processor
SPRS357A–AUGUST 2006–REVISED OCTOBER 2006
6.2
6.3
6.4
Recommended Operating Conditions
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70
Electrical Characteristics
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70
Current Consumption
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71
6.4.1
Reducing Current Consumption
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72
Emulator Connection Without Signal Buffering for the DSP
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73
Timing Parameter Symbology
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74
6.6.1
General Notes on Timing Parameters
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74
6.6.2
Test Load Circuit
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75
6.6.3
Device Clock Table
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75
Clock Requirements and Characteristics
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76
Power Sequencing
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77
6.8.1
Power Management and Supervisory Circuit Solutions
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77
General-Purpose Input/Output (GPIO)
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80
6.9.1
GPIO - Output Timing
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80
6.9.2
GPIO - Input Timing
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81
Enhanced Control Peripherals
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86
6.10.1
Enhanced Pulse Width Modulator (ePWM) Timing
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86
6.10.2
Trip-Zone Input Timing
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86
6.10.3
External Interrupt Timing
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87
6.10.4
I
2
C Electrical Specification and Timing
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88
6.10.5
Serial Peripheral Interface (SPI) Master Mode Timing
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88
6.10.6
SPI Slave Mode Timing
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92
On-Chip Analog-to-Digital Converter
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95
6.11.1
ADC Power-Up Control Bit Timing
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96
6.11.2
Definitions
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97
6.11.3
Sequential Sampling Mode (Single-Channel) (SMODE = 0)
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98
6.11.4
Simultaneous Sampling Mode (Dual-Channel) (SMODE = 1)
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99
Detailed Descriptions
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100
Flash Timing
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101
Mechanical Data
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103
6.5
6.6
6.7
6.8
6.9
6.10
6.11
6.12
6.13
7
Contents
3