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參數(shù)資料
| 型號(hào)： | TMS28F004AMB70BDBJL |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 524288 BY 8-BIT/262144 BY 16-BIT AUTO-SELECT BOOT-BLOCK FLASH MEMORIES |
| 中文描述： | 524288按8-BIT/262144由16位自動(dòng)選擇啟動(dòng)塊閃存 |
| 文件頁數(shù)： | 16/80頁 |
| 文件大小： | 1080K |
| 代理商： | TMS28F004AMB70BDBJL |
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TMS28F004Axy, TMS28F400Axy
524288 BY 8-BIT/
262
144 BY 16-BIT
AUTO-SELECT BOOT-BLOCK FLASH MEMORIES
SMJS829A – JANUARY 1996 – REVISED AUGUST 1997
16
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
reset/deep power-down mode (continued)
If RP goes low during a program or erase operation, the device powers down and, therefore, becomes
nonfunctional. Data being written or erased at that time becomes invalid or indeterminate, requiring that the
operation be performed again after power restoration.
power-supply detection
RP must be connected to the system reset/power good signal to ensure that proper synchronization is
maintained between the CPU and the flash memory operating modes. The default state after power up and exit
from deep power-down mode is read array. RP also is used to indicate that the power supply is stable so that
the operating supply voltage can be established (3 V, 3.3 V or 5 V). Figure 10 shows the proper power-up
sequence. To reset the operating supply voltage, the device must be completely powered off (V
CC
= 0 V) before
the new supply voltage is detected.
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