參數(shù)資料
型號: TMP320F28044PZS
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: Digital Signal Processor
中文描述: 數(shù)字信號處理器
文件頁數(shù): 34/107頁
文件大?。?/td> 784K
代理商: TMP320F28044PZS
www.ti.com
3.6
System Control
PLL
X1
X2
Power
Modes
Control
Watchdog
Block
28x
CPU
P
Low-Speed Peripherals
SCI-A, SPI-A
Peripheral
Registers
High-Speed Prescaler
Low-Speed Prescaler
Clock Enables
GPIO
MUX
System
Control
Registers
XCLKIN
ADC
Registers
12-Bit ADC
16 ADC inputs
LSPCLK
I/O
Peripheral Reset
SYSCLKOUT
(A)
XRS
Reset
GPIOs
Peripheral
Registers
I/O
OSC
CLKIN
(A)
HSPCLK
I
2
C-A
Peripheral
Registers
I/O
ePWM 116
Peripheral
Registers
CPU
Timers
TMS320F28044
Digital Signal Processor
SPRS357B–AUGUST 2006–REVISED MAY 2007
Each external interrupt can be enabled/disabled or qualified using positive, negative, or both positive and
negative edge. For more information, see the
TMS320x280x, 2801x, 2804x System Control and Interrupts
Reference Guide
(literature number
SPRU712
).
This section describes the F28044 device oscillator, PLL and clocking mechanisms, the watchdog function
and the low power modes.
Figure 3-5
shows the various clock and reset domains in the F28044 device
that will be discussed.
A.
CLKIN is the clock into the CPU. It is passed out of the CPU as SYSCLKOUT (that is, CLKIN is the same frequency
as SYSCLKOUT).
Figure 3-5. Clock and Reset Domains
Functional Overview
34
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