參數(shù)資料
型號(hào): TMDS3788844
廠商: Texas Instruments, Inc.
英文描述: 3M710 INSERTION CUT TOOL
中文描述: TMS370微控制器系列數(shù)據(jù)手冊(cè)
文件頁數(shù): 43/78頁
文件大?。?/td> 919K
代理商: TMDS3788844
GLOSSARY/SYMBOLS, TERMS, AND DEFINITIONS
1–35
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
R
R/W:
Read or Write operation. Goes high at the beginning of read operations and low during write operations. This
line is active during both internal and external accesses.
RAM:
Random-access memory
ratiometric conversion:
to the analog input. As V
REF
is increased, the input voltage needed to give a certain conversion value changes;
however, all conversion values keep the same relationship to V
REF
.
read:
A memory operation whereby data is output from a desired address location
An analog-to-digital conversion in which the conversion value is a ratio of the V
REF
source
read-only memory (ROM):
NOTE: Unless otherwise qualified, the term “read-only memory” implies that the contents are determined by its
structure and are unalterable.
A memory in which the contents are not intended to be altered during normal operation.
referred timer:
PACT command/definition area before the command was encountered, or if no timer has been defined, it is the
least significant 16 bits of the hardware timer.
The timer that a PACT command uses for time comparisons. This is the last timer defined in the
register file (RF):
The first 128 or 256 bytes of memory that can be accessed by the majority of the instructions
relative-addressing mode:
distance from the current location
An operating mode in which operands and code produce an absolute address at some
RESET pin:
MC pin is low when the RESET signal returns high, then the processor enters the microcomputer mode. If the MC
pin is high when the RESET signal returns high, then it enters the microprocessor mode.
A pin that, when held low, starts hardware initialization and ensures an orderly software startup. If the
ROM security:
Inhibits the reading of the ROM using any programmer
S
serial communications interface (SCI):
be programmed to be asynchronous or isosynchronous. SCI2 is a built-in serial interface that can only be pro-
grammed to be asynchronous. Many timing, data format, and protocol factors are programmable and controlled
by the SCI module in operation.
Referred to as SCI1 or SCI2. SCI1 is a built-in serial interface that can
serial peripheral interface (SPI):
ter and slave CPUs. As in the SCI, the SPI is set up by software; from then on, the CPU takes no part in timing,
data format, or protocol.
A built-in serial interface that facilitates communication between networked mas-
signed integer:
A number system used to express positive and negative integers
SPI:
Serial Peripheral Interface module
stack:
during interrupts and calls to store the current program status. The area occupied by the stack is determined by
the stack pointer and by the application program.
The part of the register file used as last-in, first-out memory for temporary-variable storage. The stack is used
stack pointer (SP):
automatically before data is pushed onto the stack and decremented after data is popped from the stack.
An 8-bit CPU register that points to the last entry or top of the stack. The SP is incremented
standby RAM:
against power failures on the main power pin.
Random-access memory which is powered through a separate power pin to protect the memory
STANDBY mode:
active. Timers remain active and can cause the CPU to exit the STANDBY mode.
A power reduction mode in which the CPU stops processing, but the on-chip oscillator remains
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