參數(shù)資料
型號(hào): TMC22071AKHC1
廠商: Fairchild Semiconductor Corporation
元件分類: 圓形連接器
英文描述: Circular Connector; No. of Contacts:66; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:18; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:18-35 RoHS Compliant: No
中文描述: 同步鎖相視頻數(shù)字化儀
文件頁(yè)數(shù): 17/24頁(yè)
文件大?。?/td> 125K
代理商: TMC22071AKHC1
PRODUCT SPECIFICATION
TMC22071A
17
Figure 19. Group Delay Equalizer Filter
Using a 20 MHz Crystal
In systems where a 20 MHz clock is not available, a crystal
may be used to generate the clock to the TMC22071A. The
crystal must be a 20 MHz “fundamental” type, not overtone.
Specific crystal characteristics are listed in Table 4 and the
connections are shown in Figure 20.
Table 4. Crystal Parameters
Figure 20. Direct Crystal Connections
Parameter
Fundamental frequency
Tolerance
Stability
Load Capacitance
Shunt Capacitance
ESR
Value
20 MHz
±
30 ppm @ 25
°
C
±
50 ppm, 0
°
C to 70
°
C
20 pF
7 pF Max.
50
W
, Max.
3.3
μ
H
3.3
μ
H
4.7
μ
H
2.2
μ
H
910
μ
H
4.7
μ
H
430 pF
65-22071-21
750 pF
430 pF
470 pF
470 pF
33 pF
20 MHz
Crystal
65-22071A-22
CLK IN
TMC22071A
300
1M
CLK OUT
33 pF
Grounding
The TMC22071A has separate analog and digital circuits. To
minimize digital crosstalk into the analog signals, the power
supplies and ground connections are provided over separate
pins (V
DD
and V
DDA
are digital and analog power supply
pins; D
GND
and A
GND
are digital and analog ground pins).
In general, the best results are obtained by tying all grounds
to a solid, low-impedance ground plane. Power supply pins
should be individually decoupled at the pin. Power supply
noise isolation should be provided between analog and digi-
tal supplies via a ferrite bead inductor on the analog lead.
Ultimately all +5 Volt power to the TMC22071A should
come from the same power source.
Another approach calls for separating analog and digital
ground. While some systems may benefit from this strategy,
analog and digital grounds must be kept within 0.1V of each
other at all times.
Interface to the TMC22x9x Encoder
The TMC22x9x Digital Video Encoders have been designed
to directly interface to the TMC22071A Digital Video
Genlock. The TMC22071A is the source for TMC22x9x
input signals CVBS
7-0
, GHSYNC, GVSYNC, LDV, and
PXCK as shown in Figure 21. These signals directly connect
to the TMC22x9x. The microprocessor interface for
TMC22x9x and TMC22071A are identical. All R/W,
RESET, data and address bus signals from the host micro-
processor are shared by the TMC22x9x and TMC22071A.
Only CS, VALID, and INT signals are separate from the
microprocessor bus.
Figure 21. TMC22x9x Interface Circuit
CVBS7:0
GHSYNC
GVSYNC
PXCK
R
D
A
C
R
LDV
65-22071A-23
TMC22071A
GENLOCKING VIDEO DIGITIZER
TMC22x9x
DIGITAL VIDEO ENCODER
MICROPROCESSOR INTERFACE
8
8
2
CVBS7:0
GHSYNC
GVSYNC
PXCK
LDV
R
D
A
C
R
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