參數(shù)資料
型號： TMC22051AKHC
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類： 顏色信號轉(zhuǎn)換
英文描述： Circular Connector; No. of Contacts:11; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:18; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:18-11 RoHS Compliant: No
中文描述： COLOR SIGNAL DECODER, PQFP100
封裝： MQFP-100
文件頁數(shù)： 12/84頁
文件大?。?/td> 417K
代理商： TMC22051AKHC
TMC22x5yA
PRODUCT SPECIFICATION
12
REV. 1.0.0 2/4/03
Control Register De
fi
nitions
(continued)
Input Processor Control (01)
7
6
5
4
3
2
1
0
Reserved
IPMUX
IP8B
TDEN
TBLK
IPCMSB
ABMUX
CKSEL
Reg
01
01
Bit
7
6
Name
Reserved
IPMUX
Description
Reserved, set to zero.
Input mux control.
Used to select the Video Input Processor, D1, or D2 data
as the VA input to the input processor.
VIDEOA is selected for VA and VIDEOB is selected for VB when IPMUX is
set LOW. VIDEOB is selected for VA and VIDEOA for VB when IPMUX is set
HIGH. For YC inputs, the luma data must be passed through the VA input and
chroma through the VB input.
IPMUX should be set LOW for line locked composite inputs.
8 bit input format.
Bottom two bits of inputs VIDEOA
9-0
and VIDEOB
9-0
are
set to zero when HIGH.
TRS detect enable.
When HIGH, the TRS words embedded in incoming
video are used to reset the horizontal and vertical state machines. When LOW
the externally provided or internally generated HSYNC and VSYNC are used
to reset the horizontal and vertical state machines.
TRS blank enable.
Blanks the TRS and AUX data words when HIGH. For line
locked and D1 data, the TRS and AUX data words are set to the luma and
chroma blanking levels as appropriate. For D2 (4*f
SC
) data, the TRS and
AUX data words are set to the sync tip level.
Chroma input msb invert.
The msb of the chroma or C
B
C
R
data are inverted
when HIGH.
AB mux control.
Selects the primary and secondary inputs to the decoder
from the DA and DB outputs of the input processor. When ABMUX is LOW,
DA is selected as the primary and DB as the secondary decoder input.
Input clock rate select.
Set HIGH for line locked clocks and LOW for
subcarrier locked clocks. Line locked clocks should be at twice the pixel data
rate, and the subcarrier clock should be at four times the subcarrier
frequency.
01
5
IP8B
01
4
TDEN
01
3
TBLK
01
2
IPCMSB
01
1
ABMUX
01
0
CKSEL
相關(guān)PDF資料
PDF描述
TMC22X5YA Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit
TMC22052AKHC Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit
TMC22053AKHC Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit
TMC22151AKHC Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit
TMC22152AKHC Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMC22052AKHC 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit
TMC22053AKHC 制造商:Rochester Electronics LLC 功能描述:- Bulk
TMC22053KHC 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Fairchild Semiconductor Corporation 功能描述:
TMC22071A 制造商:CADEKA 制造商全稱:CADEKA 功能描述:Genlocking Video Digitizer
TMC22071AKHC 功能描述:視頻 IC Video Digitizer Genlocking RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
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