參數(shù)資料
型號(hào)： TLV5580DW
廠商： Texas Instruments, Inc.
英文描述： 8-BIT, 80 MSPS LOW-POWER A/D CONVERTER
中文描述： 8位，80 MSPS的低功耗A / D轉(zhuǎn)換器
文件頁數(shù)： 17/34頁
文件大?。?/td> 531K
代理商： TLV5580DW
TLV5580
8-BIT, 80 MSPS LOW-POWER A/D CONVERTER
SLAS205A – DECEMBER 1998 – REVISED JANUARY 1999
17
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLE OF OPERATION
digital outputs
The output of TLV5580 is a standard binary code. Capacitive loading on the output should be kept as low as
possible (a maximum loading of 10 pF is recommended) to provide best performance. Higher output loading
causes higher dynamic output currents and can increase noise coupling into the device’s analog front end. To
drive higher loads, use an output buffer is recommended.
When clocking output data from TLV5580, it is important to observe its timing relation to CLK. Pipeline ADC
delay is 4.5 clock cycles to which the maximum output propagation delay is added. See Note 6 in the
specification section for more details.
layout, decoupling and grounding rules
It is necessary for any PCB using the TLV5580 to have proper grounding and layout to achieve the stated
performance. Separate analog and digital ground planes that are spliced underneath the device are advisable.
TLV5580 has digital and analog terminals on opposite sides of the package to make proper grounding easier.
Since there is no internal connection between analog and digital grounds, they have to be joined on the PCB.
Joining the digital and analog grounds at a point in close proximity to the TLV5580 is advised.
As for power supplies, separate analog and digital supply terminals are provided on the device (AV
DD
/DV
DD
).
The supply to the digital output drivers is kept separate also (DRV
DD
). Lowering the voltage on this supply from
the nominal 3.3 V to 3 V improves performance because of the lower switching noise caused by the output
buffers.
Due to the high sampling rate and switched-capacitor architecture, TLV5580 generates transients on the supply
and reference lines. Proper decoupling of these lines is essential. Decoupling as shown in the schematic of the
TLV5580 EVM is recommended.
相關(guān)PDF資料
PDF描述
TLV5580PW 8-BIT, 80 MSPS LOW-POWER A/D CONVERTER
TLV5592 2-BIT ANALOG-TO-DIGITAL CONVERTER FOR FLEX PAGER CHIPSET
TLV5592D 2-BIT ANALOG-TO-DIGITAL CONVERTER FOR FLEX PAGER CHIPSET
TLV5604D 2.7-V TO 5.5-V 10-BIT 3-mS QUADRUPLE DIGITAL-TO-ANALOG CONVERTERS WITH POWER DOWN
TLV5604PW 2.7-V TO 5.5-V 10-BIT 3-mS QUADRUPLE DIGITAL-TO-ANALOG CONVERTERS WITH POWER DOWN
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TLV5580EVM 制造商:Texas Instruments 功能描述:EVAL BD FOR TLV5580 8BIT 80 MSPS HIGH-SPEED A/D CNVRTR - Bulk
TLV5580IDW 功能描述:模數(shù)轉(zhuǎn)換器 - ADC _ RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
TLV5580IDWG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 8Bit 80MSPS 1-Ch High Ch Band Lo-Pwr RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
TLV5580IDWR 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 8Bit 80MSPS 1-Ch High Ch Band Lo-Pwr RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
TLV5580IDWRG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 8Bit 80MSPS 1-Ch High Ch Band Lo-Pwr RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
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