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參數(shù)資料
| 型號(hào)： | TLC7135C |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Analog-to-Digital Converters(并行接口4 1/2位A/D轉(zhuǎn)換器) |
| 中文描述： | 模擬到數(shù)字轉(zhuǎn)換器（并行接口4 1 / 2位的A / D轉(zhuǎn)換器） |
| 文件頁(yè)數(shù)： | 10/11頁(yè) |
| 文件大?。?/td> | 224K |
| 代理商： | TLC7135C |
ICL7135C, TLC7135C
4 1/2-DIGIT PRECISION
ANALOG-TO-DIGITAL CONVERTERS
SLAS074A – DECEMBER 1986 – REVISED MAY 1995
2–12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
maximum clock frequency (continued)
For signals with both polarities, the clock frequency can be extended above 160 kHz without error by using a
low value resistor in series with the integrating capacitor. This resistor causes the integrator to jump slightly
towards the zero-crossing level at the beginning of the deintegrate phase, and thus compensates for the
comparator delay. This series resistor should be 10
to 50
. This approach allows clock frequencies up to
480 kHz.
minimum clock frequency
The minimum clock frequency limitations result from capacitor leakage from the auto-zero and reference
capacitors. Measurement cycles as high as 10
μ
s are not influenced by leakage error.
rejection of 50-Hz or 60-Hz pickup
To maximize the rejection of 50-Hz or 60-Hz pickup, the clock frequency should be chosen so that an integral
multiple of 50-Hz or 60-Hz periods occur during the signal integrate phase. To achieve rejection of these signals,
some clock frequencies that can be used are:
50 Hz: 250, 166.66, 125, 100 kHz, etc.
60 Hz: 300, 200, 150, 120, 100, 40, 33.33 kHz, etc.
zero-crossing flip-flop
This flip-flop interrogates the comparator’s zero-crossing status. The interrogation is performed after the
previous clock cycle and the positive half of the ongoing clock cycle has occurred, so any comparator transients
that result from the clock pulses do not affect the detection of a zero-crossing. This procedure delays the
zero-crossing detection by one clock cycle. To eliminate the inaccuracy, which is caused by this delay, the
counter is disabled for one clock cycle at the beginning of the deintegrate phase. Therefore, when the
zero-crossing is detected one clock cycle later than the zero-crossing actually occurs, the correct number of
counts is displayed.
noise
The peak-to-peak noise around zero is approximately 15
μ
V (peak-to-peak value not exceeded 95% of the time).
Near full scale, this value increases to approximately 30
μ
V. Much of the noise originates in the auto-zero loop,
and is proportional to the ratio of the input signal to the reference.
analog and digital grounds
For high-accuracy applications, ground loops must be avoided. Return currents from digital circuits must not
be sent to the analog ground line.
power supplies
The ICL7135C and TLC7135C are designed to work with
±
5-V power supplies. However, 5-V operation is
possible when the input signal does not vary more than
±
1.5 V from midsupply.
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| TLC7135CDW | 功能描述:LED顯示驅(qū)動(dòng)器 Dual Slope A/D RoHS:否 制造商:Micrel 數(shù)位數(shù)量:5 片段數(shù)量: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PLCC-44 工作電源電壓:4.75 V to 11 V 最大電源電流:10 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube |
| TLC7135CDWG4 | 功能描述:LED顯示驅(qū)動(dòng)器 4.5-Bits 0.003 kSPS Muxed BCD Out RoHS:否 制造商:Micrel 數(shù)位數(shù)量:5 片段數(shù)量: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PLCC-44 工作電源電壓:4.75 V to 11 V 最大電源電流:10 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube |
| TLC7135CDWR | 功能描述:LED顯示驅(qū)動(dòng)器 4.5-Bits 0.003 kSPS Muxed BCD Out RoHS:否 制造商:Micrel 數(shù)位數(shù)量:5 片段數(shù)量: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PLCC-44 工作電源電壓:4.75 V to 11 V 最大電源電流:10 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube |
| TLC7135CDWRG4 | 功能描述:LED顯示驅(qū)動(dòng)器 4.5-Bits 0.003 kSPS Muxed BCD Out RoHS:否 制造商:Micrel 數(shù)位數(shù)量:5 片段數(shù)量: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PLCC-44 工作電源電壓:4.75 V to 11 V 最大電源電流:10 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube |
| TLC7135CN | 功能描述:LED顯示驅(qū)動(dòng)器 4.5digit .003ksps RoHS:否 制造商:Micrel 數(shù)位數(shù)量:5 片段數(shù)量: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PLCC-44 工作電源電壓:4.75 V to 11 V 最大電源電流:10 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube |
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