參數(shù)資料
型號(hào): THS8135-240CPHP
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: PARALLEL, WORD INPUT LOADING, 10-BIT DAC, PQFP48
封裝: POWER, TQFP-48
文件頁數(shù): 15/24頁
文件大小: 546K
代理商: THS8135-240CPHP
THS8135
TRIPLE 10-BIT, 80/240 MSPS VIDEO DAC WITH TRI-LEVEL SYNC AND VIDEO
(ITU-R.BT601) – COMPLIANT FULL SCALE RANGE
SLVSXXXX—10/02/00 3:44 PM
23
Copyright 2000 Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data
and other specifications are design goals. Texas Instruments
reserves the right to change or discontinue these products
ABPb &
ARPr
TBD
18.67
TBD
R
OUT
DAC Output
Resistance
TBD
C
OUT
DAC Output
Capacitance (pin
capacitance)
5pF
t
RDAC
DAC Output
Current Risetime
10 to 90% of full-
scale
2ns
t
FDAC
DAC Output
Current Falltime
10 to 90% of full-
scale
2ns
t
D(A)
Analog Output
Delay
Note 5.
Measured from
CLK=V
IH(min) to 50% of
full-scale transition
TBD
ns
t
S
Analog Output
Settling Time
Note 6.
measured from 50%
of full scale transition
on output to output
settling, within 2%
TBD
3
ns
SNR
Signal to Noise
Ratio
1MHz, -1dBFS digital
sine input
57.5
dB
SFDR
Spurious-free
Dynamic Range
1MHz, -1dBFS digital
sine input
64
dB
BW(1dB)
Bandwidth
40
(THS8135-
80)
120
(THS8135-
240)
MHz
E
glitch
Glitch energy
full-scale code
transition @ 240
MSPS
25
pVs
Notes:
1.
PSRR is measured with a 0.1uF capacitor between the COMP and AVDD pin; with a 0.1uF capacitor
connected between the VREF pin and AVSS. The ripple amplitude is within the range 100mVp-p to 500mVp-p
with the DAC output set to full scale and a double-terminated 75
(=37.5) load. PSRR is defined as
20*log(ripple voltage at DAC output / ripple voltage at AVDD input). Limits from characterization only.
2.
Crosstalk spec applies to each possible pair of the 3 DAC outputs. Limit from characterization only.
3.
The imbalance between DACs applies to all possible pairs of the three DACs.
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