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參數(shù)資料
| 型號(hào)： | THC63LVDM63R |
| 廠商： | THine Electronics, Inc. |
| 英文描述： | REDUCED SWING LVDS 24Bit/18Bit COLOR HOST-LCD PANEL INTERFACE |
| 中文描述： | 低擺幅的LVDS 24Bit/18Bit主機(jī)彩色液晶顯示器面板界面 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 203K |
| 代理商： | THC63LVDM63R |
Copyright 2001-2003 THine Electronics, Inc. All rights reserved 8
THine Electronics, Inc.
THC63LVDM83R /THC63LVDM63R_Rev2.0
Switching Characteristics
V
CC
= 3.0V ~ 3.6V, Ta = -10
~ +70
Symbol
Parameter
Min.
Typ.
Max.
Units
t
TCIT
t
TCP
t
TCH
t
TCL
t
TCD
t
TS
t
TH
t
LVT
t
TOP1
CLK IN Transition time
5.0
ns
CLK IN Period
11.76
T
50.0
ns
CLK IN High Time
0.35T
0.5T
0.65T
ns
CLK IN Low Time
0.35T
0.5T
0.65T
ns
CLK IN to TCLK+/- Delay
2T/7
ns
TTL Data Setup to CLK IN
2.5
ns
TTL Data Hold from CKL IN
2.5
ns
LVDS Transition Time
0.6
1.5
ns
Output Data Position0 (T=11.76ns)
-0.2
0.0
+0.2
ns
t
TOP0
Output Data Position1 (T=11.76ns)
ns
t
TOP6
Output Data Position2 (T=11.76ns)
ns
t
TOP5
Output Data Position3(T=11.76ns)
ns
t
TOP4
Output Data Position4 (T=11.76ns)
ns
t
TOP3
Output Data Position5 (T=11.76ns)
ns
t
TOP2
Output Data Position6 (T=11.76ns)
ns
t
TPLL
Phase Lock Loop Set
10.0
ms
°
C
°
C
T
7
---
0.2
–
T
7
---
T
7
---
0.2
+
2T
---
7
0.2
–
2T
---
7
2T
---
7
0.2
+
3T
---
7
0.2
–
3T
---
7
3T
---
7
0.2
+
4T
---
7
0.2
–
4T
---
7
4T
---
7
0.2
+
5T
---
7
0.2
–
5T
---
7
5T
---
7
0.2
+
6T
---
7
0.2
–
6T
---
7
6T
---
7
0.2
+
AC Timing Diagrams
TTL Input
5pF
20%
80%
20%
80%
t
LVT
t
LVT
CLK IN
LVDS Output
90%
10%
90%
10%
t
TCIT
t
TCIT
V
diff
100
V
diff
=(TA+)-(TA-)
TA+
TA-
LVDS Output Load
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| THC63LVDM83C-5S | 制造商:THine Electronics Inc 功能描述:Tray |
| THC63LVDM83D | 制造商:THine Electronics Inc 功能描述: |
| THC63LVDM83E | 制造商:THine Electronics Inc 功能描述:Tray |
| THC63LVDM83R | 制造商:THine Electronics Inc 功能描述:IC,REDUCED SWING LVDS 24BIT COLOR HOST-LCD PANEL INTERFACE,TSSOP,56PIN,PLASTIC |
| THC63LVDM87 | 制造商:THine Electronics Inc 功能描述:Bulk |
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