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參數(shù)資料
| 型號： | TFP503PZP |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | 14 X 14 MM, 1 MM HEIGHT, 0.50 MM PITCH, GREEN, PLASTIC, HTQFP-100 |
| 文件頁數(shù)： | 11/27頁 |
| 文件大?。?/td> | 624K |
| 代理商： | TFP503PZP |
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TFP503
PanelBus HDCP DIGITAL RECEIVER
SLDS149 AUGUST 2004
19
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
I2C register map (continued)
VEN_ID
Subaddress = C0
Read Only
Default = 4C
7
6
5
4
3
2
1
0
VEN_ID[7:0]
Subaddress = C1
Read Only
Default = 01
7
6
5
4
3
2
1
0
VEN_ID[15:8]
This read-only register contains the 16-bit Texas Instruments vendor ID for the TFP503. VEN_ID[15:0] is
hardwired to 0x014C.
DEV_ID
Subaddress = C2
Read Only
Default = 01
7
6
5
4
3
2
1
0
DEV_ID[7:0]
Subaddress = C3
Read Only
Default = 05
7
6
5
4
3
2
1
0
DEV_ID[15:8]
This read-only register contains the 16-bit device ID for the TFP503. DEV_ID[15:0] is hardwired to 0x0501.
REV_ID
Subaddress = C4
Read Only
Default = 01
7
6
5
4
3
2
1
0
REV_ID[7:0]
This read-only register contains the 8-bit revision ID for the TFP503. REV_ID[7:0] is hardwired to 0x01.
I2C interface
The I2C interface accesses the internal TFP503 registers. This two-terminal interface consists of one clock line,
DDC_SCL, and one serial data line, DDC_SDA. The basic I2C access cycles are shown in Figures 16 and 17.
DDC_SDA
Start Condition (S)
Stop Condition (P)
DDC_SCL
Figure 16. I2C Start and Stop Conditions
The basic access cycle consists of the following:
D A start condition
D A slave address cycle
D A subaddress cycle
D Any number of data cycles
D A stop condition
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