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參數(shù)資料
| 型號： | TFDT4000 |
| 英文描述： | Integrated Transceiver |
| 中文描述： | 集成收發(fā)器 |
| 文件頁數(shù)： | 4/9頁 |
| 文件大?。?/td> | 245K |
| 代理商： | TFDT4000 |
Edition January 7, 1996
4
TFDT4000
Optoelectronic characteristics
Tamb = 25°C, V
cc
=5V unless otherwise noted.
Parameter
Test condition
Symbol
MIN
TYP
MAX
Unit
Remark
Receiver, cont.
Rise time @load=
C=15pF, R=2.2k
t
r
20
200
ns
Fall time @load=
C=15pF, R=2.2k
t
f
20
200
ns
Rxd signal electrical
output pulse width
2.4 kBit/s, input
pulse length
1.41μs to 3/16 of
bit length
t
p
1.41
20
μs
Rxd signal electrical
output pulse width
115.2 kBit/s,
input pulse
length 1.41μs to
3/16 of bit length
t
p
1.41
8
μs
Rxd signal electrical
output pulse width
500 kHz, duty
cycle 50%
t
p
0.8
1
1.2
μs
V
cc
= 5 V only
Output delay time
(Rxd)
Output level =
0.5*V
cc
@
Ee=0.040 W/m2
t
dl
1
2
μs
Delay of leading edge
of output signal
related to leading
edge of optical input
signal
Jitter, leading edge of
output signal
Over a period of
10bit, 115.2 kBd
t
j
2
μs
Output delay time
(Rxd)
Output level =
0.5*V
cc
t
dt
6.5
μs
Delay of trailing edge
of output signal
related to trailing edge
of optical input signal
Latency
Recovery from
last transmitted
pulse to
1.1*threshold
sensitivity
t
L
100
800
μs
Transmitter
Driver current
IRED
Current limiting
resistor in series
to IRED:
RS= 8.2
@ 5 V
cc2
=5V
I
d
0.3
0.5
A
I
d
can be adjusted by
variation of R
S
, see
appl. hint page 6
Logic Low Transmitter
Input Voltage
VIL(Txd)
0
0.8
V
Logic High Transmitter
Input Voltage
VIH(Txd)
2.4
V
cc
V
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