參數(shù)資料
型號: TE28F256J3A-115
廠商: Intel Corp.
英文描述: Intel StrataFlash Memory (J3)
中文描述: 英特爾StrataFlash存儲器(J3)
文件頁數(shù): 24/72頁
文件大?。?/td> 905K
代理商: TE28F256J3A-115
256-Mbit J3 (x8/x16)
24
Datasheet
0606_16
NOTES:
1. CE
X
low is defined as the last edge of CE0, CE1, or CE2 that enables the device. CE
X
high is defined at the
first edge of CE0, CE1, or CE2 that disables the device (see
Table 13
).
2. When reading the flash array a faster t
GLQV
(R16) applies. For non-array reads, R4 applies (i.e.: Status
Register reads, query reads, or device identifier reads).
NOTE:
CE
X
low is defined as the last edge of CE0, CE1, or CE2 that enables the device. CE
X
high is defined at
the first edge of CE0, CE1, or CE2 that disables the device (see
Table 13
).
Figure 10. 4-Word Page Mode Read Waveform
00
01
10
11
1
2
3
4
R10
R9
R15
R10
R5
R8
R7
R6
R4
R3
R1
R2
A[MAX:3] [A]
A[2:1] [A]
CEx [E]
OE# [G]
WE# [W]
D[15:0] [Q]
RP# [P]
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