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參數(shù)資料
| 型號(hào)： | TDA9321 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | I2C-bus controlled TV input processor |
| 中文描述： | 的I2C控制的電視處理器總線輸入 |
| 文件頁(yè)數(shù)： | 26/44頁(yè) |
| 文件大?。?/td> | 249K |
| 代理商： | TDA9321 |
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1998 Dec 16
26
Philips Semiconductors
Preliminary specification
I
2
C-bus controlled TV input processor
TDA9321H
SECAM demodulator
f
blos
f
blos
/T
black level offset frequency
black level offset frequency
variation with temperature
pole frequency of de-emphasis
ratio pole and zero frequency
non-linearity
calibration voltage
7
60
kHz
Hz/K
f
p
f
p
/f
z
NL
V
cal
Baseband delay line
V
o
77
3
85
3
4
93
3
5
kHz
%
V
variation of output signal
for adjacent time samples
at constant input signals
0.1
0.1
dB
V
r(clk)(p-p)
residual clock signal
(peak-to-peak value)
delay
5
mV
t
d
delayed signal
non-delayed signal
when delay line is
bypassed or not (with
bit BPS)
63.94
40
64.0
60
64.06
80
5
μ
s
ns
%
V
o
difference in output amplitude
PALplus helper demodulator
V
o(helper)(p-p)
helper output voltage
(peak-to-peak value)
helper set-up amplitude
610
686
770
mV
V
su(helper)
only helper
lines 22 and 23
within pass band
including H/2 phase error
for modulated helper in
demodulated 0 to 1 MHz
signal
at 4.43 MHz signal
in ACC
380
400
420
mV
t
d(g)
e(dem)
α
sup
group delay
demodulation phase error
suppression
36
10
5
ns
deg
dB
V
r
THD
t
o(helper-Y)
V
offset
residual signal
total harmonic distortion
helper output timing to Y output
offset voltage
36
36
10
5
dB
dB
ns
mV
for demodulated mid grey
to inserted mid grey level;
mid grey line 23 to line 22
t
W(su)(helper)
t
d
helper set-up pulse width
delay between mid sync of input
and start of helper set-up
delay between start of black
set-up and start of helper set-up
3 dB bandwidth of helper
baseband
52.8
8.6
μ
s
μ
s
bits YD3 to YD0 = 1011;
note 30
only lines 22 and 23
30.8
μ
s
B
helper(
3dB)
2.6
MHz
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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| TDA9321H | I2C-bus controlled TV input processor |
| TDA9330 | I2C-bus controlled TV display processors |
| TDA9330H | I2C-bus controlled TV display processors |
| TDA9331H | I2C-bus controlled TV display processors |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TDA9321H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:I2C-bus controlled TV input processor |
| TDA9330 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:I2C-bus controlled TV display processors |
| TDA9330H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:I2C-bus controlled TV display processors |
| TDA9331H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:I2C-bus controlled TV display processors |
| TDA9332 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:I2C-bus controlled TV display processors |
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