參數(shù)資料
型號: TC7109ACLWR
元件分類: ADC
英文描述: 1-CH 12-BIT DUAL-SLOPE ADC, PARALLEL ACCESS, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 8/28頁
文件大?。?/td> 598K
代理商: TC7109ACLWR
TC7109/A
DS21456B-page 16
2002 Microchip Technology Inc.
3.5.6
REFERENCE SOURCES
A major factor in the absolute accuracy of the ADC is
the stability of the reference voltage. The 12-bit resolu-
tion of the TC7109A is one part in 4096, or 244 ppm.
Thus, for the on-board reference temperature coeffi-
cient of 70ppm/°C, a temperature difference of 3°C will
introduce a one-bit absolute error. Where the ambient
temperature is not controlled, or where high accuracy
absolute measurements are being made, it is recom-
mended that an external high quality reference be
used.
A reference output (Pin 29) is provided, which may be
used with a resistive divider to generate a suitable ref-
erence voltage (20mA may be sunk without significant
variation in output voltage). A pull-up bias device is pro-
vided, which sources about 10
A. The output voltage is
nominally 2.8V below V+. When using the on-board ref-
erence, REF OUT (Pin 29) should be connected to
REF IN- (pin 39), and REF IN+ should be connected to
the wiper of a precision potentiometer between REF
OUT and V+. The test circuit shows the circuit for a
204.8mV reference, generated by a 2k
precision
potentiometer in series with a 24k
fixed resistor.
4.0
INTERFACING
4.1
Direct Mode
Combinations of chip enable and byte enable control
signals, which may be used when interfacing the
TC7109A to parallel data lines, are shown in Figure 4-1.
The CE/LOAD input may be tied low, allowing either byte
to be controlled by its own enable (see Figure 4-1(A)).
Figure 4-1(B) shows the HBEN and LBEN as flag
inputs, and CE/LOAD as a master enable, which could
be the READ strobe available from most microproces-
sors. Figure 4-1(C) shows a configuration where the
two byte enables are connected together. The CE/
LOAD is a chip enable, and the HBEN and LBEN may
be used as a second chip enable, or connected to
ground. The 14 data outputs will be enabled at the
same time. In the direct MODE, SEND should be tied
to V+.
Figure 4-2 shows interfacing several TC7109A's to a
bus, ganging the HBEN and LBEN signals to several
converters together, and using the CE/LOAD input to
select the desired converter.
Figure 4-3 through Figure 4-5 give practical circuits uti-
lizing the parallel three-state output capabilities of the
TC7109A. Figure 4-3 shows parallel interface to the
8748/49 systems via an 8255 PPI, where the TC7109A
data outputs are active at all times. This interface can
be used in a read-after-update sequence, as shown in
Figure 4-4. The data is accessed by the high-to-low
transition of the STATUS driving an interrupt to the
microcontroller.
The RUN/HOLD input is also used to initiate conver-
sions under software control.
Direct interfacing to most microcontroller busses is
easily accomplished through the three-state output of
the TC7109A.
Figure 4-8 is a typical connection diagram. To ensure
requirements for setup and hold times, minimum pulse
widths, and the drive limitations on long busses are
met, it is necessary to carefully consider the system
timing in this type of interface. This type of interface is
used when the memory peripheral address density is
low, providing simple address decoding. Interrupt han-
dling can be simplified by using an interface to reduce
the component count.
FIGURE 4-1:
DIRECT MODE CHIP AND BYTE ENABLE COMBINATION
TC7109A
MODE
CE/LOAD
B9 - B12
POL, OR
B1 - B8
LBEN
HBEN
GND
8
Analog In
6
Convert
Control
RUN/HOLD
TC7109A
MODE
CE/LOAD
B1 - B12
POL, OR
LBEN
HBEN
GND
Analog In
Convert
RUN/HOLD
TC7109A
MODE
CE/LOAD
B9 - B12
POL, OR
B1 - B8
LBEN
HBEN
8
Analog In
6
Convert
RUN/HOLD
Chip Select 1
GND or
Chip Select 2
14
Byte Flags
GND
Chip Select
A.
B.
C.
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