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參數(shù)資料
| 型號： | TC1130 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | 32-Bit Single-Chip Microcontroller |
| 中文描述： | 32位單片機(jī) |
| 文件頁數(shù)： | 25/113頁 |
| 文件大?。?/td> | 1505K |
| 代理商： | TC1130 |
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TC1130
Data Sheet
21
V0.3, 2003-09
Serial Interfaces
The TC1130 includes five serial peripheral interface units:
– Asynchronous/Synchronous Serial Interface (ASC)
– High-Speed Synchronous Serial Interface (SSC)
– Inter IC Serial Interface (IIC)
– Universal Serial Bus Interface (USB)
– Micro Link Serial Bus Interface (MLI)
Asynchronous/Synchronous Serial Interface (ASC)
Figure 5
shows a global view of the functional block of three Asynchronous/
Synchronous Serial interfaces (ASC0, ASC1 and ASC2).
Each ASC Module, (ASC0/ASC1/ASC2) communicates with the external world via one
pair of I/O lines. The RXD line is the receive data input signal (in Synchronous Mode also
output). TXD is the transmit output signal. Clock control, address decoding, and interrupt
service request control are managed outside the ASC Module kernel.
The Asynchronous/Synchronous Serial Interfaces provide serial communication
between the TC1130 and other microcontrollers, microprocessors or external
peripherals.
Each ASC supports full-duplex asynchronous communication and half-duplex
synchronous communication. In Synchronous Mode, data is transmitted or received
synchronous to a shift clock which is generated by the ASC internally. In Asynchronous
Mode, 8-bit or 9-bit data transfer, parity generation, and the number of stop bits can be
selected. Parity, framing, and overrun error detection are provided to increase the
reliability of data transfers. Transmission and reception of data are double-buffered. For
multiprocessor communication, a mechanism is included to distinguish address bytes
from data bytes. Testing is supported by a loop-back option. A 13-bit baud rate generator
provides the ASC with a separate serial clock signal that can be very accurately adjusted
by a prescaler implemented as a fractional divider.
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