參數(shù)資料
型號(hào)： TB1261F
廠商： Toshiba Corporation
英文描述： TOSHIBA BiCMOS INTEGRATED CIRCUIT, SILICON MONOLITHIC
中文描述： 東芝的BiCMOS集成電路，硅單片
文件頁(yè)數(shù)： 54/66頁(yè)
文件大小： 1544K
代理商： TB1261F
TB1261F/TB1262F
2002-6-30 54 / 66
Note
D16
Items/Symbols
Gate Pulse Start
Phase
/ PH
GP
Gate Pulse Width
/ W
GP
Bus
conditions
All: Preset
Measurement methods
(1) Input a composite sync signal into Pin61.
(2) According to the following figure, measure "PH
GP
" &
"W
GP
".
63.5
μ
s
Sync in(Pin61)
H AFC(Pin43)
SCP OUT(Pin37)
4.7
μ
s
PH
GP
W
GP
5V
0V
0.25V
D18
Vertical Free-run
Frequency
/ F
VAUFR50
/ F
VAUFR60
/ F
V50FR
/ F
V60FR
V-Freq:
0/1/2
Others: Preset
(1) Input a 50Hz composite sync signal into Pin61.
(2) Set V-Freq to 0.
(3) For no input, measure the frequency of V Ramp at Pin46,
that is "F
VAUFR50
".
(4) Input a 60Hz composite sync signal into Pin61.
(5) Repeat (2)&(3), that is “F
VAUFR60
”
(6) Set V-Freq. To 1/2, repeat (2), that is "F
V50FR
" / "F
V60FR
".
(1) Input a 50Hz/60Hz composite sync signal into Pin61.
(2) Measure "T
50GPM
" / "T
60GPM
" at Pin37. (cf. Fig.D19)
D19
Gate Pulse
V-Masking Period
/ T
50GPM
/ T
60GPM
All: Preset
相關(guān)PDF資料
PDF描述
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