參數(shù)資料
型號(hào)： T89C51AC2-SLSIM
廠商： Atmel
文件頁數(shù)： 36/121頁
文件大?。?/td> 0K
描述： IC 8051 MCU FLASH 32K 44PLCC
標(biāo)準(zhǔn)包裝： 27
系列： 89C
核心處理器： 8051
芯體尺寸： 8-位
速度： 40MHz
連通性： UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 34
程序存儲(chǔ)器容量： 32KB（32K x 8）
程序存儲(chǔ)器類型： 閃存
EEPROM 大?。?/td> 2K x 8
RAM 容量： 1.25K x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10b
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-LCC（J 形引線）
包裝： 管件
21
A/T89C51AC2
4127H–8051–02/08
Figure 9. Power-down Exit Waveform Using INT1:0#
2.
Generate a reset.
–
A logic high on the RST pin clears PD bit in PCON register directly and
asynchronously. This starts the oscillator and restores the clock to the CPU
and peripherals. Program execution momentarily resumes with the
instruction immediately following the instruction that activated Power-down
mode and may continue for a number of clock cycles before the internal
reset algorithm takes control. Reset initializes the T89C51CC02 and vectors
the CPU to address 0000h.
Notes:
1. During the time that execution resumes, the internal RAM cannot be accessed; how-
ever, it is possible for the Port pins to be accessed. To avoid unexpected outputs at
the Port pins, the instruction immediately following the instruction that activated the
Power-down mode should not write to a Port pin or to the external RAM.
2. Exit from power-down by reset redefines all the SFRs, but does not affect the internal
RAM content.
Table 14. Pin Conditions in Special Operating Modes
INT1:0#
OSC
Power-down phase
Oscillator restart phase
Active phase
Mode
Port 0
Port 1
Port 2
Port 3
Port 4
ALE
PSEN#
Reset
Floating
High
Idle
(internal
code)
Data
High
Idle
(external
code)
Floating
Data
High
Power-
Down(inter
nal code)
Data
Low
Power-
Down
(external
code)
Floating
Data
Low
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