參數(shù)資料
型號(hào)： T89C51AC2-SLSIM
廠商： Atmel
文件頁數(shù)： 101/121頁
文件大小： 0K
描述： IC 8051 MCU FLASH 32K 44PLCC
標(biāo)準(zhǔn)包裝： 27
系列： 89C
核心處理器： 8051
芯體尺寸： 8-位
速度： 40MHz
連通性： UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 34
程序存儲(chǔ)器容量： 32KB（32K x 8）
程序存儲(chǔ)器類型： 閃存
EEPROM 大?。?/td> 2K x 8
RAM 容量： 1.25K x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10b
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-LCC（J 形引線）
包裝： 管件
80
A/T89C51AC2
4127H–8051–02/08
Figure 44. PCA PWM Mode
PCA Watchdog Timer
An on-board Watchdog timer is available with the PCA to improve system reliability with-
out increasing chip count. Watchdog timers are useful for systems that are sensitive to
noise, power glitches, or electrostatic discharge. Module 4 is the only PCA module that
can be programmed as a Watchdog. However, this module can still be used for other
modes if the Watchdog is not needed. The user pre-loads a 16-bit value in the compare
registers. Just like the other compare modes, this 16-bit value is compared to the PCA
timer value. If a match is allowed to occur, an internal reset will be generated. This will
not cause the RST pin to be driven high.
To hold off the reset, the user has three options:
periodically change the compare value so it will never match the PCA timer,
periodically change the PCA timer value so it will never match the compare values,
or
disable the Watchdog by clearing the WDTE bit before a match occurs and then re-
enable it.
The first two options are more reliable because the Watchdog timer is never disabled as
in the third option. If the program counter ever goes astray, a match will eventually occur
and cause an internal reset. If other PCA modules are being used the second option not
recommended either. Remember, the PCA timer is the time base for all modules;
changing the time base for other modules would not be a good idea. Thus, in most appli-
cations the first solution is the best option.
CL rolls over from FFh TO 00h loads
CCAPnH contents into CCAPnL
CCAPnL
CCAPnH
8-Bit
Comparator
CL (8 bits)
“0”
“1”
CL < CCAPnL
CL > = CCAPnL
CEX
PWMn
CCAPMn.1
ECOMn
CCAPMn.6
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