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參數(shù)資料
| 型號(hào)： | SYM53C860 |
| 廠商： | LSI Corporation |
| 英文描述： | Single-Chip High-Performance PCI-Ultra SCSI (Fast-20) I/O Processor(單片、高性能PCI-超級(jí)SCSI (Fast-20) I/O 處理器) |
| 中文描述： | 單芯片高性能的PCI -超的SCSI（快速- 20）I / O處理器（單片，高性能的PCI -超級(jí)的SCSI（快速- 20）的I / O處理器） |
| 文件頁(yè)數(shù)： | 5/8頁(yè) |
| 文件大?。?/td> | 38K |
| 代理商： | SYM53C860 |
5
Register 08h
Revision ID
Read Only
RID
7
Default >>>
0
RID
6
RID
5
RID
4
RID
3
RID
2
RID
1
RID
0
0
0
1
0
0
1
1
This field specifies device and revision identifiers. The value of this register is
13h.
Register 34h
Capability Pointer
Read Only
CP
CP
7
Default >>>
0
CP
5
CP
4
CP
3
CP
2
CP
1
CP
0
6
1
0
0
0
0
0
0
This register provides an offset into the function’s PCI Configuration Space for the location of
the first item in the capabilities linked list. This register is set by the device to 40h.
Register 40h
Capability ID
Read Only
CID
7
Default >>>
0
CID
6
CID
5
CID
4
CID
3
CID
2
CID
1
CID
0
0
0
0
0
0
0
1
This register indicates the type of the current data structure (linked list item). This register is set
by the device to a value of 01h, indicating the Power Management Data Structure.
Register 41h
Next Item Pointer
Read Only
NP
NP
7
Default >>>
0
NP
5
NP
4
NP
3
NP
2
NP
1
NP
0
6
0
0
0
0
0
0
0
This register describes the location of the next item in the function’s capability list. This register
is set by the device to a value of 00h, indicating that power management is the last capability in
the linked list of extended capabilities.
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