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參數(shù)資料
| 型號(hào)： | STP40N03L-20 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | N-Channel Enhancement Mode "Ultra High Density" Power MOS Transistor(Ｎ溝道增強(qiáng)模式高密度功率ＭＯＳ晶體管) |
| 中文描述： | N溝道增強(qiáng)模式“超高密度”功率MOS晶體管（不適用溝道增強(qiáng)模式高密度功率馬鞍山晶體管） |
| 文件頁(yè)數(shù)： | 1/7頁(yè) |
| 文件大?。?/td> | 65K |
| 代理商： | STP40N03L-20 |
STP40N03L-20
N - CHANNEL ENHANCEMENT MODE
”ULTRA HIGH DENSITY” POWER MOS TRANSISTOR
PRELIMINARY DATA
s
TYPICAL RDS(on) = 0.016
s
AVALANCHE RUGGED TECHNOLOGY
s
100% AVALANCHE TESTED
s
HIGH CURRENT CAPABILITY
s
175
oC OPERATING TEMPERATURE
s
HIGH dV/dt CAPABILITY
s
APPLICATION ORIENTED
CHARACTERIZATION
APPLICATIONS
s
HIGH CURRENT, HIGH SPEED SWITCHING
s
POWER MOTOR CONTROL
s
DC-DC & DC-AC CONVERTERS
s
SYNCRONOUS RECTIFICATION
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Uni t
VDS
Drain-source Voltage (VGS =0)
30
V
VDGR
Drain- gate Voltage (RGS =20 k
)30
V
VGS
Gate-source Voltage
± 15
V
ID
Drain Current (continuous) at Tc =25
oC40
A
ID
Drain Current (continuous) at Tc =100
oC28
A
IDM(
)
Drain Current (pulsed)
160
A
Pto t
Total Dissipat ion at Tc =25
oC90
W
Derating Fact or
0.6
W/
oC
dV/dt(1)
Peak Diode Recovery voltage slope
6
V/ ns
Tst g
St orage Temperature
-65 to 175
oC
Tj
Max. Operating Junction Temperat ure
175
oC
(
) Pulse width limited by safe operating area
TYPE
VDSS
RDS(on)
ID
ST P40N03L-20
30 V
< 0.02
40 A
March 1996
1
2
3
TO-220
1/7
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